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Searched
refs:RegEnd
(Results
1 - 9
of
9
) sorted by null
/external/llvm/lib/CodeGen/
LiveIntervalUnion.cpp
36
LiveRange::const_iterator
RegEnd
= Range.end();
41
if (++RegPos ==
RegEnd
)
49
--
RegEnd
;
50
SegPos.insert(
RegEnd
->start,
RegEnd
->end, &VirtReg);
51
for (; RegPos !=
RegEnd
; ++RegPos, ++SegPos)
63
LiveRange::const_iterator
RegEnd
= Range.end();
74
if (RegPos ==
RegEnd
)
/external/swiftshader/third_party/LLVM/lib/CodeGen/
LiveIntervalUnion.cpp
35
LiveInterval::iterator
RegEnd
= VirtReg.end();
40
if (++RegPos ==
RegEnd
)
48
--
RegEnd
;
49
SegPos.insert(
RegEnd
->start,
RegEnd
->end, &VirtReg);
50
for (; RegPos !=
RegEnd
; ++RegPos, ++SegPos)
62
LiveInterval::iterator
RegEnd
= VirtReg.end();
73
if (RegPos ==
RegEnd
)
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
LiveIntervalUnion.cpp
37
LiveRange::const_iterator
RegEnd
= Range.end();
42
if (++RegPos ==
RegEnd
)
50
--
RegEnd
;
51
SegPos.insert(
RegEnd
->start,
RegEnd
->end, &VirtReg);
52
for (; RegPos !=
RegEnd
; ++RegPos, ++SegPos)
64
LiveRange::const_iterator
RegEnd
= Range.end();
75
if (RegPos ==
RegEnd
)
/external/llvm/include/llvm/CodeGen/
CallingConvLower.h
471
void addInRegsParamInfo(unsigned RegBegin, unsigned
RegEnd
) {
472
ByValRegs.push_back(ByValInfo(RegBegin,
RegEnd
));
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
CallingConvLower.h
482
void addInRegsParamInfo(unsigned RegBegin, unsigned
RegEnd
) {
483
ByValRegs.push_back(ByValInfo(RegBegin,
RegEnd
));
/external/llvm/lib/Target/AMDGPU/
R600InstrInfo.cpp
[
all
...]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
R600InstrInfo.cpp
[
all
...]
/external/llvm/lib/Target/ARM/
ARMISelLowering.cpp
[
all
...]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
ARMISelLowering.cpp
[
all
...]
Completed in 388 milliseconds