OpenGrok
Home
Sort by relevance
Sort by last modified time
Full Search
Definition
Symbol
File Path
History
|
|
Help
Searched
refs:RegList1
(Results
1 - 5
of
5
) sorted by null
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
MipsGenCallingConv.inc
96
static const MCPhysReg
RegList1
[] = {
99
if (unsigned Reg = State.AllocateReg(
RegList1
)) {
152
static const MCPhysReg
RegList1
[] = {
158
if (unsigned Reg = State.AllocateReg(
RegList1
, RegList2)) {
212
static const MCPhysReg
RegList1
[] = {
215
if (unsigned Reg = State.AllocateReg(
RegList1
)) {
246
static const MCPhysReg
RegList1
[] = {
252
if (unsigned Reg = State.AllocateReg(
RegList1
, RegList2)) {
299
static const MCPhysReg
RegList1
[] = {
302
if (unsigned Reg = State.AllocateReg(
RegList1
)) {
[
all
...]
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
ARMGenCallingConv.inc
134
static const MCPhysReg
RegList1
[] = {
140
if (unsigned Reg = State.AllocateReg(
RegList1
, RegList2)) {
274
static const MCPhysReg
RegList1
[] = {
277
if (unsigned Reg = State.AllocateReg(
RegList1
)) {
379
static const MCPhysReg
RegList1
[] = {
382
if (unsigned Reg = State.AllocateReg(
RegList1
)) {
433
static const MCPhysReg
RegList1
[] = {
436
if (unsigned Reg = State.AllocateReg(
RegList1
)) {
510
static const MCPhysReg
RegList1
[] = {
513
if (unsigned Reg = State.AllocateReg(
RegList1
)) {
[
all
...]
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
X86GenCallingConv.inc
176
static const MCPhysReg
RegList1
[] = {
179
if (unsigned Reg = State.AllocateReg(
RegList1
)) {
398
static const MCPhysReg
RegList1
[] = {
401
if (unsigned Reg = State.AllocateReg(
RegList1
)) {
430
static const MCPhysReg
RegList1
[] = {
433
if (unsigned Reg = State.AllocateReg(
RegList1
)) {
582
static const MCPhysReg
RegList1
[] = {
585
if (unsigned Reg = State.AllocateReg(
RegList1
)) {
642
static const MCPhysReg
RegList1
[] = {
645
if (unsigned Reg = State.AllocateReg(
RegList1
)) {
[
all
...]
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
AArch64GenCallingConv.inc
136
static const MCPhysReg
RegList1
[] = {
142
if (unsigned Reg = State.AllocateReg(
RegList1
, RegList2)) {
380
static const MCPhysReg
RegList1
[] = {
386
if (unsigned Reg = State.AllocateReg(
RegList1
, RegList2)) {
665
static const MCPhysReg
RegList1
[] = {
668
if (unsigned Reg = State.AllocateReg(
RegList1
)) {
856
static const MCPhysReg
RegList1
[] = {
862
if (unsigned Reg = State.AllocateReg(
RegList1
, RegList2)) {
965
static const MCPhysReg
RegList1
[] = {
971
if (unsigned Reg = State.AllocateReg(
RegList1
, RegList2))
[
all
...]
/external/llvm/lib/Target/Hexagon/
HexagonISelLowering.cpp
299
static const MCPhysReg
RegList1
[] = {
305
if (unsigned Reg = State.AllocateReg(
RegList1
, RegList2)) {
[
all
...]
Completed in 548 milliseconds