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Searched
refs:RegList2
(Results
1 - 5
of
5
) sorted by null
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
MipsGenCallingConv.inc
155
static const MCPhysReg
RegList2
[] = {
158
if (unsigned Reg = State.AllocateReg(RegList1,
RegList2
)) {
222
static const MCPhysReg
RegList2
[] = {
225
if (unsigned Reg = State.AllocateReg(
RegList2
)) {
249
static const MCPhysReg
RegList2
[] = {
252
if (unsigned Reg = State.AllocateReg(RegList1,
RegList2
)) {
310
static const MCPhysReg
RegList2
[] = {
313
if (unsigned Reg = State.AllocateReg(
RegList2
)) {
406
static const MCPhysReg
RegList2
[] = {
409
if (unsigned Reg = State.AllocateReg(
RegList2
)) {
[
all
...]
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
ARMGenCallingConv.inc
137
static const MCPhysReg
RegList2
[] = {
140
if (unsigned Reg = State.AllocateReg(RegList1,
RegList2
)) {
284
static const MCPhysReg
RegList2
[] = {
287
if (unsigned Reg = State.AllocateReg(
RegList2
)) {
443
static const MCPhysReg
RegList2
[] = {
446
if (unsigned Reg = State.AllocateReg(
RegList2
)) {
520
static const MCPhysReg
RegList2
[] = {
523
if (unsigned Reg = State.AllocateReg(
RegList2
)) {
660
static const MCPhysReg
RegList2
[] = {
666
if (unsigned Reg = State.AllocateReg(
RegList2
, RegList3))
[
all
...]
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
X86GenCallingConv.inc
188
static const MCPhysReg
RegList2
[] = {
191
if (unsigned Reg = State.AllocateReg(
RegList2
)) {
444
static const MCPhysReg
RegList2
[] = {
447
if (unsigned Reg = State.AllocateReg(
RegList2
)) {
595
static const MCPhysReg
RegList2
[] = {
598
if (unsigned Reg = State.AllocateReg(
RegList2
)) {
654
static const MCPhysReg
RegList2
[] = {
657
if (unsigned Reg = State.AllocateReg(
RegList2
)) {
884
static const MCPhysReg
RegList2
[] = {
887
if (unsigned Reg = State.AllocateReg(
RegList2
)) {
[
all
...]
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
AArch64GenCallingConv.inc
139
static const MCPhysReg
RegList2
[] = {
142
if (unsigned Reg = State.AllocateReg(RegList1,
RegList2
)) {
383
static const MCPhysReg
RegList2
[] = {
386
if (unsigned Reg = State.AllocateReg(RegList1,
RegList2
)) {
675
static const MCPhysReg
RegList2
[] = {
678
if (unsigned Reg = State.AllocateReg(
RegList2
)) {
859
static const MCPhysReg
RegList2
[] = {
862
if (unsigned Reg = State.AllocateReg(RegList1,
RegList2
)) {
968
static const MCPhysReg
RegList2
[] = {
971
if (unsigned Reg = State.AllocateReg(RegList1,
RegList2
)) {
[
all
...]
/external/llvm/lib/Target/Hexagon/
HexagonISelLowering.cpp
302
static const MCPhysReg
RegList2
[] = {
305
if (unsigned Reg = State.AllocateReg(RegList1,
RegList2
)) {
[
all
...]
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