| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| DelaySlotFiller.cpp | 65 SmallSet<unsigned, 32>& RegUses);
69 SmallSet<unsigned, 32>& RegUses);
77 SmallSet<unsigned, 32> &RegUses);
133 SmallSet<unsigned, 32> RegUses;
153 insertCallUses(slot, RegUses);
155 insertDefsUses(slot, RegDefs, RegUses);
177 if (delayHasHazard(I, sawLoad, sawStore, RegDefs, RegUses)) {
178 insertDefsUses(I, RegDefs, RegUses);
191 SmallSet<unsigned, 32> &RegUses)
220 if (IsRegInSet(RegDefs, Reg) || IsRegInSet(RegUses, Reg)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| MipsDelaySlotFiller.cpp | 68 SmallSet<unsigned, 32>& RegUses);
72 SmallSet<unsigned, 32>& RegUses);
80 SmallSet<unsigned, 32> &RegUses);
130 SmallSet<unsigned, 32> RegUses;
132 insertDefsUses(slot, RegDefs, RegUses);
157 if (delayHasHazard(FI, sawLoad, sawStore, RegDefs, RegUses)) {
158 insertDefsUses(FI, RegDefs, RegUses);
173 SmallSet<unsigned, 32> &RegUses) {
206 if (IsRegInSet(RegDefs, Reg) || IsRegInSet(RegUses, Reg))
218 // Insert Defs and Uses of MI into the sets RegDefs and RegUses
[all...] |
| /external/llvm/lib/Target/Lanai/ |
| LanaiDelaySlotFiller.cpp | 68 SmallSet<unsigned, 32> &RegUses);
74 SmallSet<unsigned, 32> &RegUses);
150 SmallSet<unsigned, 32> RegUses;
152 insertDefsUses(Slot, RegDefs, RegUses);
170 if (delayHasHazard(FI, SawLoad, SawStore, RegDefs, RegUses)) {
171 insertDefsUses(FI, RegDefs, RegUses);
182 SmallSet<unsigned, 32> &RegUses) {
214 if (isRegInSet(RegDefs, Reg) || isRegInSet(RegUses, Reg))
226 // Insert Defs and Uses of MI into the sets RegDefs and RegUses.
229 SmallSet<unsigned, 32> &RegUses) {
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
| LanaiDelaySlotFiller.cpp | 68 SmallSet<unsigned, 32> &RegUses);
74 SmallSet<unsigned, 32> &RegUses);
149 SmallSet<unsigned, 32> RegUses;
151 insertDefsUses(Slot, RegDefs, RegUses);
169 if (delayHasHazard(FI, SawLoad, SawStore, RegDefs, RegUses)) {
170 insertDefsUses(FI, RegDefs, RegUses);
181 SmallSet<unsigned, 32> &RegUses) {
213 if (isRegInSet(RegDefs, Reg) || isRegInSet(RegUses, Reg))
225 // Insert Defs and Uses of MI into the sets RegDefs and RegUses.
228 SmallSet<unsigned, 32> &RegUses) {
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| DelaySlotFiller.cpp | 72 SmallSet<unsigned, 32>& RegUses);
76 SmallSet<unsigned, 32>& RegUses);
84 SmallSet<unsigned, 32> &RegUses);
174 SmallSet<unsigned, 32> RegUses;
198 insertCallDefsUses(slot, RegDefs, RegUses);
200 insertDefsUses(slot, RegDefs, RegUses);
220 if (delayHasHazard(I, sawLoad, sawStore, RegDefs, RegUses)) {
221 insertDefsUses(I, RegDefs, RegUses);
234 SmallSet<unsigned, 32> &RegUses)
263 if (IsRegInSet(RegDefs, Reg) || IsRegInSet(RegUses, Reg)
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
| DelaySlotFiller.cpp | 70 SmallSet<unsigned, 32>& RegUses);
74 SmallSet<unsigned, 32>& RegUses);
82 SmallSet<unsigned, 32> &RegUses);
172 SmallSet<unsigned, 32> RegUses;
196 insertCallDefsUses(slot, RegDefs, RegUses);
198 insertDefsUses(slot, RegDefs, RegUses);
218 if (delayHasHazard(I, sawLoad, sawStore, RegDefs, RegUses)) {
219 insertDefsUses(I, RegDefs, RegUses);
232 SmallSet<unsigned, 32> &RegUses)
261 if (IsRegInSet(RegDefs, Reg) || IsRegInSet(RegUses, Reg)
[all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceRegAlloc.cpp | 466 // Decrement Item from RegUses[].
470 --RegUses[RegAlias];
471 assert(RegUses[RegAlias] >= 0);
490 // Increment Item in RegUses[].
494 assert(RegUses[RegAlias] >= 0);
495 ++RegUses[RegAlias];
628 assert(RegUses[RegAlias] >= 0);
629 ++RegUses[RegAlias];
641 assert(RegUses[RegAlias] >= 0);
642 ++RegUses[RegAlias]
[all...] |
| IceRegAlloc.h | 127 /// RegUses[I] is the number of live ranges (variables) that register I is
130 llvm::SmallVector<int32_t, REGS_SIZE> RegUses;
|
| /external/llvm/lib/CodeGen/ |
| ImplicitNullChecks.cpp | 150 DenseSet<unsigned> RegUses;
216 RegUses.insert(MO.getReg());
283 for (unsigned Reg : RegUses)
|
| /external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/ |
| LoopStrengthReduce.cpp | 174 // Update RegUses. The data structure is not optimized for this purpose;
243 const RegUseTracker &RegUses) const;
360 const RegUseTracker &RegUses) const {
362 if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx))
366 if (RegUses.isRegUsedByUsesOtherThan(*I, LUIdx))
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
| LoopStrengthReduce.cpp | 272 // Update RegUses. The data structure is not optimized for this purpose;
367 const RegUseTracker &RegUses) const;
563 const RegUseTracker &RegUses) const {
565 if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx))
568 if (RegUses.isRegUsedByUsesOtherThan(BaseReg, LUIdx))
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| LoopStrengthReduce.cpp | 207 // Update RegUses. The data structure is not optimized for this purpose;
298 const RegUseTracker &RegUses) const;
456 const RegUseTracker &RegUses) const {
458 if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx))
461 if (RegUses.isRegUsedByUsesOtherThan(BaseReg, LUIdx))
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| GCNRegPressure.cpp | 316 auto const RegUses = collectVirtualRegUses(MI, LIS, *MRI);
320 for (const auto &U : RegUses) {
343 for (const auto &U : RegUses) {
|
