/external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-mca/ |
DispatchStage.cpp | 42 const unsigned RegisterMask = PRF.isAvailable(RegDefs); 44 if (RegisterMask) {
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/art/compiler/optimizing/ |
stack_map_stream.h | 109 BitTableBuilder<RegisterMask> register_masks_;
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stack_map_stream.cc | 97 BitTableBuilder<RegisterMask>::Entry entry; 98 entry[RegisterMask::kValue] = register_mask >> shift; 99 entry[RegisterMask::kShift] = shift;
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/external/llvm/tools/llvm-readobj/ |
ARMWinEHPrinter.cpp | 148 void Decoder::printRegisters(const std::pair<uint16_t, uint32_t> &RegisterMask) { 154 const uint16_t GPRMask = std::get<0>(RegisterMask); 155 const uint16_t VFPMask = std::get<1>(RegisterMask); 241 uint16_t RegisterMask = (Link << (Prologue ? 14 : 15)) 244 assert((~RegisterMask & (1 << 13)) && "sp must not be set"); 245 assert((~RegisterMask & (1 << (Prologue ? 15 : 14))) && "pc must not be set"); 250 printRegisters(std::make_pair(RegisterMask, 0));
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ARMWinEHPrinter.h | 81 void printRegisters(const std::pair<uint16_t, uint32_t> &RegisterMask);
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/external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-readobj/ |
ARMWinEHPrinter.cpp | 148 void Decoder::printRegisters(const std::pair<uint16_t, uint32_t> &RegisterMask) { 154 const uint16_t GPRMask = std::get<0>(RegisterMask); 155 const uint16_t VFPMask = std::get<1>(RegisterMask); 241 uint16_t RegisterMask = (Link << (Prologue ? 14 : 15)) 244 assert((~RegisterMask & (1 << 13)) && "sp must not be set"); 245 assert((~RegisterMask & (1 << (Prologue ? 15 : 14))) && "pc must not be set"); 250 printRegisters(std::make_pair(RegisterMask, 0));
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ARMWinEHPrinter.h | 81 void printRegisters(const std::pair<uint16_t, uint32_t> &RegisterMask);
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/art/runtime/ |
stack_map.h | 253 class RegisterMask : public BitTableAccessor<2> { 255 BIT_TABLE_HEADER(RegisterMask) 494 BitTable<RegisterMask> register_masks_;
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/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 60 BasicBlock, VALUETYPE, CONDCODE, Register, RegisterMask, [all...] |
SelectionDAGNodes.h | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 60 BasicBlock, VALUETYPE, CONDCODE, Register, RegisterMask, [all...] |
SelectionDAGNodes.h | [all...] |
/external/libunwind_llvm/src/ |
Unwind-EHABI.cpp | 189 uint32_t RegisterMask(uint8_t start, uint8_t count_minus_one) { 288 uint32_t registers = RegisterMask(4, byte & 0x07); [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 91 case ISD::RegisterMask: return "RegisterMask";
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SelectionDAGISel.cpp | [all...] |
SelectionDAG.cpp | 415 case ISD::RegisterMask: [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 112 case ISD::RegisterMask: return "RegisterMask"; [all...] |
SelectionDAGISel.cpp | [all...] |
SelectionDAG.cpp | 493 case ISD::RegisterMask: [all...] |