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    Searched refs:SCLK_DIV_ISP_VAL (Results 1 - 2 of 2) sorted by null

  /external/u-boot/arch/arm/mach-exynos/
exynos5_setup.h 177 #define SCLK_DIV_ISP_VAL (SPI1_ISP_RATIO << 12) \
clock_init_exynos5.c 767 writel(SCLK_DIV_ISP_VAL, &clk->sclk_div_isp);

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