| /external/llvm/lib/Target/PowerPC/ |
| PPCQPXLoadSplat.cpp | 86 MachineInstr *SMI = *SI;
87 unsigned SplatReg = SMI->getOperand(0).getReg();
88 unsigned SrcReg = SMI->getOperand(1).getReg();
120 // If SMI is directly after MI, then MBBI's base iterator is
121 // pointing at SMI. Adjust MBBI around the call to erase SMI to
124 SMI->eraseFromParent();
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| PPCQPXLoadSplat.cpp | 86 MachineInstr *SMI = *SI;
87 unsigned SplatReg = SMI->getOperand(0).getReg();
88 unsigned SrcReg = SMI->getOperand(1).getReg();
120 // If SMI is directly after MI, then MBBI's base iterator is
121 // pointing at SMI. Adjust MBBI around the call to erase SMI to
124 SMI->eraseFromParent();
|
| /external/llvm/test/MC/ARM/ |
| arm-trustzone.s | 18 smi #0xf @ SMI is old (ARMv6KZ) name for SMC
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| arm-trustzone.s | 18 smi #0xf @ SMI is old (ARMv6KZ) name for SMC
|
| /external/u-boot/arch/x86/include/asm/arch-braswell/ |
| gpio.h | 140 SMI,
|
| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Library/PlatformSecLib/Ia32/ |
| Flat32.asm | 246 ; (2) Disable NMI's/SMI's
280 ; Disable SMI (Disables SMI wire, not SMI messages)
393 ; Clear Host Bridge SMI, NMI, INTR fields
397 and eax, NOT(NMI + SMI + INTR) ; Clear NMI, SMI, INTR fields
|
| Flat32.S | 113 .equ SMI, (0x00001000)
358 # Disable SMI (Disables SMI wire, not SMI messages)
504 # Clear Host Bridge SMI, NMI, INTR fields
510 andl $~(NMI + SMI + INTR), %eax # Clear NMI, SMI, INTR fields
|
| /external/v8/src/parsing/ |
| token.h | 148 T(SMI, nullptr, 0) \
|
| parser-base.h | [all...] |
| scanner.cc | 808 case Token::SMI:
[all...] |
| parser.cc | 249 // TODO(leszeks): Do some literal collapsing here if we're appending Smi or
336 case Token::SMI: {
[all...] |
| /device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/ |
| SmiEntry.asm | 17 ; Code template of the SMI handler for a particular processor
|
| SmiEntry.S | 18 # Code template of the SMI handler for a particular processor
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/ |
| SmiEntry.S | 18 # Code template of the SMI handler for a particular processor
|
| SmiEntry.asm | 17 ; Code template of the SMI handler for a particular processor
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/ |
| SmiEntry.S | 18 # Code template of the SMI handler for a particular processor
|
| SmiEntry.asm | 17 ; Code template of the SMI handler for a particular processor
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/X64/ |
| SmiEntry.S | 18 # Code template of the SMI handler for a particular processor
|
| SmiEntry.asm | 17 ; Code template of the SMI handler for a particular processor
|
| /device/linaro/bootloader/edk2/IntelFrameworkPkg/ |
| FrameworkSpecConformance.txt | [all...] |
| /external/u-boot/arch/powerpc/cpu/mpc83xx/ |
| start.S | 385 STD_EXCEPTION(0x1400, SMI, UnknownException)
|
| /external/u-boot/board/intel/cherryhill/ |
| cherryhill.c | 113 NA, 12, SMI, 0x4818, NORTH),
|
| /external/u-boot/doc/ |
| README.x86 | [all...] |
| /external/clang/lib/Sema/ |
| SemaDeclCXX.cpp | [all...] |
