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    Searched refs:SPI_BASE_ADDRESS (Results 1 - 7 of 7) sorted by null

  /external/u-boot/arch/x86/include/asm/arch-braswell/
iomap.h 24 #define SPI_BASE_ADDRESS 0xfed01000
  /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/
PlatformBaseAddresses.h 59 #define SPI_BASE_ADDRESS 0xFED01000 // SPI Memory Base Address
  /external/u-boot/arch/x86/include/asm/arch-baytrail/
iomap.h 30 #define SPI_BASE_ADDRESS 0xfed01000
  /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformDxe/
Platform.c 1017 (UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU0)),
1019 (VOID *)(UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU0)));
1023 (UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU1)),
1025 (VOID *)(UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU1)));
1029 (UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_OPTYPE),
1031 (VOID *)(UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_OPTYPE));
1035 (UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_PREOP),
1037 (VOID *)(UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_PREOP));
    [all...]
  /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformInitPei/
PchInitPeim.c 653 PchPlatformPolicyPpi->SpiBase = SPI_BASE_ADDRESS;
702 SpiHsfsReg = MmioRead32 (SPI_BASE_ADDRESS + R_PCH_SPI_HSFS);
704 MmioWrite32 (SPI_BASE_ADDRESS + R_PCH_SPI_FDOC, V_PCH_SPI_FDOC_FDSS_FSDM);
705 SpiFdodReg = MmioRead32 (SPI_BASE_ADDRESS + R_PCH_SPI_FDOD);
  /external/u-boot/arch/x86/include/asm/arch-baytrail/acpi/
southcluster.asl 170 Memory32Fixed(ReadWrite, SPI_BASE_ADDRESS, SPI_BASE_SIZE)
  /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformPei/
Platform.c 636 (UINT32)((SPI_BASE_ADDRESS & B_PCH_LPC_SPI_BASE_BAR) | B_PCH_LPC_SPI_BASE_EN)
    [all...]

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