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    Searched refs:SSP_CTRL1_PHASE (Results 1 - 2 of 2) sorted by null

  /external/u-boot/drivers/spi/
mxs_spi.c 103 reg |= (mxs_slave->mode & SPI_CPHA) ? SSP_CTRL1_PHASE : 0;
  /external/u-boot/arch/arm/include/asm/arch-mxs/
regs-ssp.h 263 #define SSP_CTRL1_PHASE (1 << 10)

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