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Searched
refs:ScaledReg
(Results
1 - 9
of
9
) sorted by null
/external/swiftshader/third_party/LLVM/include/llvm/Transforms/Utils/
AddrModeMatcher.h
38
Value *
ScaledReg
;
39
ExtAddrMode() : BaseReg(0),
ScaledReg
(0) {}
44
return (BaseReg == O.BaseReg) && (
ScaledReg
== O.
ScaledReg
) &&
/external/swiftshader/third_party/LLVM/lib/Transforms/Utils/
AddrModeMatcher.cpp
51
WriteAsOperand(OS,
ScaledReg
, /*PrintType=*/false);
80
if (AddrMode.Scale != 0 && AddrMode.
ScaledReg
!= ScaleReg)
88
TestAddrMode.
ScaledReg
= ScaleReg;
103
TestAddrMode.
ScaledReg
= AddLHS;
367
AddrMode.
ScaledReg
= Addr;
371
AddrMode.
ScaledReg
= 0;
523
Value *BaseReg = AMAfter.BaseReg, *
ScaledReg
= AMAfter.
ScaledReg
;
525
// If the BaseReg or
ScaledReg
was referenced by the previous addrmode, their
527
if (ValueAlreadyLiveAtInst(BaseReg, AMBefore.BaseReg, AMBefore.
ScaledReg
))
[
all
...]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/
LoopStrengthReduce.cpp
152
// the same
ScaledReg
and Scale.
156
" with the same
ScaledReg
and Scale"));
325
/// 1. BaseRegs.size > 1 implies
ScaledReg
!= NULL and
326
/// 2.
ScaledReg
!= NULL implies Scale != 1 || !BaseRegs.empty().
328
/// formula should be put in the
ScaledReg
.
341
const SCEV *
ScaledReg
= nullptr;
453
if (!
ScaledReg
)
462
const SCEVAddRecExpr *SAR = dyn_cast<const SCEVAddRecExpr>(
ScaledReg
);
466
// If
ScaledReg
is not a recurrent expr, or it is but its loop is not current
468
// loop, we want to swap the reg in BaseRegs with
ScaledReg
[
all
...]
/external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/
LoopStrengthReduce.cpp
223
///
ScaledReg
- The 'scaled' register for this use. This should be non-null
225
const SCEV *
ScaledReg
;
232
Formula() :
ScaledReg
(0), UnfoldedOffset(0) {}
332
return !!
ScaledReg
+ BaseRegs.size();
339
ScaledReg
?
ScaledReg
->getType() :
353
return S ==
ScaledReg
||
361
if (
ScaledReg
)
362
if (RegUses.isRegUsedByUsesOtherThan(
ScaledReg
, LUIdx))
396
if (
ScaledReg
)
[
all
...]
CodeGenPrepare.cpp
848
Value *V = AddrMode.
ScaledReg
;
[
all
...]
/external/llvm/lib/Transforms/Scalar/
LoopStrengthReduce.cpp
260
/// 1. BaseRegs.size > 1 implies
ScaledReg
!= NULL and
261
/// 2.
ScaledReg
!= NULL implies Scale != 1 || !BaseRegs.empty().
272
const SCEV *
ScaledReg
;
281
ScaledReg
(nullptr), UnfoldedOffset(0) {}
384
if (
ScaledReg
)
391
/// Every formula having more than one base register, must use the
ScaledReg
401
// Keep the invariant sum in BaseRegs and one of the variant sum in
ScaledReg
.
402
ScaledReg
= BaseRegs.back();
407
// If
ScaledReg
is an invariant, try to find a variant expression.
408
while (Try < BaseRegsSize && !isa<SCEVAddRecExpr>(
ScaledReg
))
[
all
...]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
CodeGenPrepare.cpp
217
cl::desc("Allow combining of
ScaledReg
field in Address sinking."));
[
all
...]
/external/llvm/lib/CodeGen/
CodeGenPrepare.cpp
[
all
...]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
SIRegisterInfo.cpp
[
all
...]
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