| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/DebugInfo/DWARF/ |
| DWARFExpression.h | 45 SignBit = 0x8,
46 SignedSize1 = SignBit | Size1,
47 SignedSize2 = SignBit | Size2,
48 SignedSize4 = SignBit | Size4,
49 SignedSize8 = SignBit | Size8,
50 SignedSizeLEB = SignBit | SizeLEB,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/DebugInfo/DWARF/ |
| DWARFExpression.cpp | 127 unsigned Signed = Size & Operation::SignBit;
132 switch (Size & ~Operation::SignBit) {
242 unsigned Signed = Size & Operation::SignBit;
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| LegalizeFloatTypes.cpp | 186 SDValue SignBit = DAG.getNode(ISD::SHL, dl, RVT, DAG.getConstant(1, RVT),
189 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit);
194 SignBit = DAG.getNode(ISD::SRL, dl, RVT, SignBit,
196 TLI.getShiftAmountTy(SignBit.getValueType())));
197 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit);
199 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit);
[all...] |
| LegalizeDAG.cpp | [all...] |
| TargetLowering.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
| InstCombineSimplifyDemanded.cpp | 665 APInt SignBit(APInt::getSignBit(BitWidth));
667 SignBit = APIntOps::lshr(SignBit, ShiftAmt);
677 } else if ((KnownOne & SignBit) != 0) { // New bits are known one.
[all...] |
| InstCombineCompares.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeFloatTypes.cpp | 262 SDValue SignBit = DAG.getNode(
266 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit);
271 SignBit =
272 DAG.getNode(ISD::SRL, dl, RVT, SignBit,
274 TLI.getShiftAmountTy(SignBit.getValueType(),
276 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit);
278 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit);
[all...] |
| LegalizeDAG.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| TargetLowering.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeFloatTypes.cpp | 265 SDValue SignBit = DAG.getNode(
269 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit);
274 SignBit =
275 DAG.getNode(ISD::SRL, dl, RVT, SignBit,
277 TLI.getShiftAmountTy(SignBit.getValueType(),
279 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit);
281 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit);
[all...] |
| LegalizeDAG.cpp | 71 uint8_t SignBit;
[all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineSimplifyDemanded.cpp | 655 APInt SignBit(APInt::getSignBit(BitWidth));
657 SignBit = APIntOps::lshr(SignBit, ShiftAmt);
668 } else if ((KnownOne & SignBit) != 0) { // New bits are known one.
[all...] |
| InstCombineCompares.cpp | [all...] |
| /external/llvm/lib/Support/ |
| APInt.cpp | 1068 unsigned SignBit = APINT_BITS_PER_WORD - BitWidth;
1070 (((int64_t(VAL) << SignBit) >> SignBit) >> shiftAmt));
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Support/ |
| APInt.cpp | [all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 330 MachineSDNode *flipSignBit(const SDValue &N, SDNode **SignBit = nullptr);
[all...] |
