/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
AVRInstrInfo.cpp | 56 unsigned DestLo, DestHi, SrcLo, SrcHi; 59 TRI.splitReg(SrcReg, SrcLo, SrcHi); 63 .addReg(SrcLo, getKillRegState(KillSrc));
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/external/llvm/lib/Target/Mips/ |
MipsSEInstrInfo.cpp | 566 const MachineOperand &SrcLo = I->getOperand(1), &SrcHi = I->getOperand(2); 580 LoInst.addReg(SrcLo.getReg(), getKillRegState(SrcLo.isKill()));
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
MipsSEInstrInfo.cpp | 724 const MachineOperand &SrcLo = I->getOperand(1), &SrcHi = I->getOperand(2); 738 LoInst.addReg(SrcLo.getReg(), getKillRegState(SrcLo.isKill())); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
HexagonFrameLowering.cpp | [all...] |
HexagonInstrInfo.cpp | [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonInstrInfo.cpp | [all...] |
HexagonFrameLowering.cpp | [all...] |
/external/swiftshader/third_party/subzero/src/ |
IceTargetLoweringX86BaseImpl.h | [all...] |
IceInstARM32.cpp | [all...] |
IceTargetLoweringARM32.h | 321 void div0Check(Type Ty, Operand *SrcLo, Operand *SrcHi); [all...] |
IceTargetLoweringARM32.cpp | [all...] |