| /external/v8/src/compiler/arm64/ |
| code-generator-arm64.cc | 127 return Operand(InputRegister32(index), SXTB);
157 return Operand(InputRegister64(index), SXTB);
[all...] |
| /external/vixl/test/aarch32/ |
| test-simulator-cond-rd-operand-rn-a32.cc | 124 M(Sxtb) \
481 #include "aarch32/traces/simulator-cond-rd-operand-rn-sxtb-a32.h"
|
| test-simulator-cond-rd-operand-rn-ror-amount-a32.cc | 116 M(Sxtb) \
546 #include "aarch32/traces/simulator-cond-rd-operand-rn-ror-amount-sxtb-a32.h"
[all...] |
| test-simulator-cond-rd-operand-rn-ror-amount-t32.cc | 116 M(Sxtb) \
546 #include "aarch32/traces/simulator-cond-rd-operand-rn-ror-amount-sxtb-t32.h"
[all...] |
| test-simulator-cond-rd-operand-rn-t32.cc | 124 M(Sxtb) \
481 #include "aarch32/traces/simulator-cond-rd-operand-rn-sxtb-t32.h"
|
| test-disasm-a32.cc | [all...] |
| /art/compiler/utils/arm64/ |
| jni_macro_assembler_arm64.cc | 509 ___ Sxtb(reg_w(reg.AsWRegister()), reg_w(reg.AsWRegister()));
|
| /external/v8/src/arm64/ |
| macro-assembler-arm64-inl.h | 940 void TurboAssembler::Sxtb(const Register& rd, const Register& rn) {
943 sxtb(rd, rn);
[all...] |
| macro-assembler-arm64.h | [all...] |
| /external/vixl/src/aarch64/ |
| macro-assembler-aarch64.h | [all...] |
| /external/vixl/src/aarch32/ |
| macro-assembler-aarch32.h | [all...] |
| /external/vixl/test/aarch64/ |
| test-assembler-aarch64.cc | 445 __ Add(sp, sp, Operand(x17, SXTB));
492 __ Mvn(x11, Operand(x2, SXTB, 1));
667 __ Mov(x24, Operand(x13, SXTB, 1));
721 __ Mov(w20, Operand(w11, SXTB, 1));
805 __ Orr(w10, w0, Operand(w1, SXTB));
899 __ Orn(w10, w0, Operand(w1, SXTB));
[all...] |
