/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
nv50_ir_lowering_gm107.cpp | 127 bld.mkOp3(OP_SHFL, TYPE_F32, arr, i->getSrc(0), lane, quad); 129 bld.mkOp3(OP_SHFL, TYPE_F32, shadow, i->getSrc(array + dim + indirect), lane, quad); 134 bld.mkOp3(OP_SHFL, TYPE_F32, crd[c], i->getSrc(c + array), lane, quad); 139 bld.mkOp3(OP_SHFL, TYPE_F32, tmp, i->dPdx[c].get(), lane, quad); 140 add = bld.mkOp2(OP_QUADOP, TYPE_F32, crd[c], tmp, crd[c]); 147 bld.mkOp3(OP_SHFL, TYPE_F32, tmp, i->dPdy[c].get(), lane, quad); 148 add = bld.mkOp2(OP_QUADOP, TYPE_F32, crd[c], tmp, crd[c]); 156 src[c] = bld.mkOp1v(OP_ABS, TYPE_F32, bld.getSSA(), crd[c]); 158 bld.mkOp2(OP_MAX, TYPE_F32, val, src[0], src[1]); 159 bld.mkOp2(OP_MAX, TYPE_F32, val, src[2], val) [all...] |
nv50_ir_lowering_nv50.cpp | 499 bld.mkCvt(OP_CVT, TYPE_F32, af, ty, div->getSrc(0)); 500 bld.mkCvt(OP_CVT, TYPE_F32, bf, ty, div->getSrc(1)); 514 bf = bld.mkOp1v(OP_RCP, TYPE_F32, bld.getSSA(), bf); 517 bld.mkOp2(OP_MUL, TYPE_F32, (qf = bld.getSSA()), af, bf)->rnd = ROUND_Z; 518 bld.mkCvt(OP_CVT, ty, (q0 = bld.getSSA()), TYPE_F32, qf)->rnd = ROUND_Z; 525 bld.mkCvt(OP_CVT, TYPE_F32, (aR = bld.getSSA()), TYPE_U32, aRf); 527 bld.mkOp2(OP_MUL, TYPE_F32, (qRf = bld.getSSA()), aR, bf)->rnd = ROUND_Z; 528 bld.mkCvt(OP_CVT, TYPE_U32, (qR = bld.getSSA()), TYPE_F32, qRf) 734 src[c] = bld.mkOp1v(OP_ABS, TYPE_F32, bld.getSSA(), i->getSrc(c)); 736 bld.mkOp2(OP_MAX, TYPE_F32, val, src[0], src[1]) [all...] |
nv50_ir_from_tgsi.cpp | 692 return nv50_ir::TYPE_F32; 725 return nv50_ir::TYPE_F32; [all...] |
nv50_ir_target_nvc0.cpp | 194 opInfo[i].srcTypes = 1 << (int)TYPE_F32; 195 opInfo[i].dstTypes = 1 << (int)TYPE_F32; 364 case TYPE_F32: 384 if (i->op == OP_ADD && i->sType == TYPE_F32) { 449 if (insn->sType != TYPE_F32) 497 if (insn->op == OP_ADD && insn->sType == TYPE_F32) { 503 return insn->dType == TYPE_F32; 539 if (i->op == OP_MUL && i->dType != TYPE_F32) 566 if (i->dType == TYPE_F32) { 656 return (a->dType == TYPE_F32 || a->op == OP_ADD | [all...] |
nv50_ir_inlines.h | 64 case TYPE_F32: 88 case TYPE_F32: 116 return flt ? TYPE_F32 : (sgn ? TYPE_S32 : TYPE_U32);
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nv50_ir_lowering_nvc0.cpp | 107 i->setType(TYPE_F32); 119 assert(i->sType == TYPE_F32); 289 if (i->sType == TYPE_F32 && prog->getType() != Program::TYPE_COMPUTE) 295 if (i->sType != TYPE_F32) 830 src[c] = bld.mkOp1v(OP_ABS, TYPE_F32, bld.getSSA(), i->getSrc(c)); 832 bld.mkOp2(OP_MAX, TYPE_F32, val, src[0], src[1]); 833 bld.mkOp2(OP_MAX, TYPE_F32, val, src[2], val); 834 bld.mkOp1(OP_RCP, TYPE_F32, val, val); 836 i->setSrc(c, bld.mkOp2v(OP_MUL, TYPE_F32, bld.getSSA(), 913 DataType sTy = (i->op == OP_TXF) ? TYPE_U32 : TYPE_F32; [all...] |
nv50_ir_target_nv50.cpp | 146 opInfo[i].srcTypes = 1 << (int)TYPE_F32; 147 opInfo[i].dstTypes = 1 << (int)TYPE_F32; 476 if (insn->sType != TYPE_F32) 504 if (insn->dType != TYPE_F32) 537 if (i->dType == TYPE_F32) {
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nv50_ir.cpp | 338 reg.type = TYPE_F32; 399 case TYPE_F32: 416 case TYPE_F32: return reg.data.u32 & (1 << 31); 443 case TYPE_F32: 458 if (reg.type != TYPE_F32) 588 dType = sType = TYPE_F32; 897 : Instruction(fn, op, TYPE_F32) 1039 : Instruction(fn, op, TYPE_F32)
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nv50_ir_peephole.cpp | 451 case TYPE_F32: 532 if (i->dnz && i->dType == TYPE_F32) { 539 case TYPE_F32: 563 case TYPE_F32: res.data.f32 = a->data.f32 / b->data.f32; break; 573 case TYPE_F32: res.data.f32 = a->data.f32 + b->data.f32; break; 583 case TYPE_F32: res.data.f32 = a->data.f32 - b->data.f32; break; 593 case TYPE_F32: res.data.f32 = pow(a->data.f32, b->data.f32); break; 601 case TYPE_F32: res.data.f32 = MAX2(a->data.f32, b->data.f32); break; 611 case TYPE_F32: res.data.f32 = MIN2(a->data.f32, b->data.f32); break; 760 case TYPE_F32 [all...] |
nv50_ir_emit_gk110.cpp | 210 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000)); 333 if (i->sType == TYPE_F32) { 494 if (isLIMM(i->src(1), TYPE_F32)) { 577 if (isLIMM(i->src(1), TYPE_F32)) { 656 if (isLIMM(i->src(1), TYPE_F32)) { 1014 case TYPE_F32: 1113 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break; 1140 case TYPE_F32: op2 = 0x000; op1 = 0x800; break; 1159 if (i->dType == TYPE_F32) { 1196 if (i->dType == TYPE_F32) { [all...] |
nv50_ir_emit_nv50.cpp | 585 case TYPE_F32: // fall through 611 case TYPE_F32: 953 case TYPE_F32: code[0] |= 0x80000000; break; 1301 case TYPE_F32: code[0] |= 0x80000000; break; [all...] |
nv50_ir_build_util.cpp | 154 DataType ty = TYPE_F32; 266 Instruction *quadop = mkOp2(OP_QUADOP, TYPE_F32, def, src0, src1); 404 return mkOp1v(OP_MOV, TYPE_F32, dst ? dst : getScratch(), mkImm(f)); 455 sym->reg.type = TYPE_F32;
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nv50_ir_print.cpp | 456 case TYPE_F32: PRINT("%f", reg.data.f32); break;
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nv50_ir_emit_nvc0.cpp | 216 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000)); 540 if (isLIMM(i->src(1), TYPE_F32)) { 597 if (isLIMM(i->src(1), TYPE_F32)) { 667 if (isLIMM(i->src(1), TYPE_F32)) { 1197 if (i->sType == TYPE_F32) 1231 case TYPE_F32: [all...] |
nv50_ir_emit_gm107.cpp | 343 if (insn->sType == TYPE_F32 || insn->sType == TYPE_F16) { 1179 emitField(0x34, 1, insn->dType == TYPE_F32); [all...] |
nv50_ir.h | 271 TYPE_F32, [all...] |
/external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
ir3_group.c | 53 ir3_MOV(instr->block, instr, TYPE_F32); 73 instr->cat1.src_type = TYPE_F32; 74 instr->cat1.dst_type = TYPE_F32; 89 ir3_MOV(instr->block, instr, TYPE_F32);
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instr-a3xx.h | 221 TYPE_F32 = 1, 233 case TYPE_F32: 252 return (type == TYPE_F32) || (type == TYPE_F16);
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ir3_print.c | 70 [TYPE_F32] = "f32",
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ir3_compiler_nir.c | 591 mov->cat1.src_type = TYPE_F32; 592 mov->cat1.dst_type = TYPE_F32; 721 instr = ir3_COV(block, instr, TYPE_U32, TYPE_F32); 868 type_t type = (alu->op == nir_op_imov) ? TYPE_U32 : TYPE_F32; 901 dst[0] = ir3_COV(b, src[0], TYPE_F32, TYPE_S32); 904 dst[0] = ir3_COV(b, src[0], TYPE_F32, TYPE_U32); 907 dst[0] = ir3_COV(b, src[0], TYPE_S32, TYPE_F32); 910 dst[0] = ir3_COV(b, src[0], TYPE_U32, TYPE_F32); 918 dst[0] = ir3_COV(b, ir3_b2n(b, src[0]), TYPE_U32, TYPE_F32); 955 dst[0]->cat5.type = TYPE_F32; [all...] |
ir3.h | 781 case TYPE_F32: return TYPE_F16; [all...] |
disasm-a3xx.c | 62 [TYPE_F32] = "f32",
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