/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
X86RegisterInfo.h | 73 virtual const TargetRegisterClass * 74 getMatchingSuperRegClass(const TargetRegisterClass *A, 75 const TargetRegisterClass *B, unsigned Idx) const; 77 virtual const TargetRegisterClass * 78 getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const; 80 const TargetRegisterClass* 81 getLargestLegalSuperClass(const TargetRegisterClass *RC) const; 83 /// getPointerRegClass - Returns a TargetRegisterClass used for pointer 85 const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const; 90 const TargetRegisterClass * [all...] |
/external/llvm/lib/Target/X86/ |
X86RegisterInfo.h | 65 const TargetRegisterClass * 66 getMatchingSuperRegClass(const TargetRegisterClass *A, 67 const TargetRegisterClass *B, 70 const TargetRegisterClass * 71 getSubClassWithSubReg(const TargetRegisterClass *RC, 74 const TargetRegisterClass * 75 getLargestLegalSuperClass(const TargetRegisterClass *RC, 78 /// getPointerRegClass - Returns a TargetRegisterClass used for pointer 80 const TargetRegisterClass * 87 const TargetRegisterClass * [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
X86RegisterInfo.h | 65 const TargetRegisterClass * 66 getMatchingSuperRegClass(const TargetRegisterClass *A, 67 const TargetRegisterClass *B, 70 const TargetRegisterClass * 71 getSubClassWithSubReg(const TargetRegisterClass *RC, 74 const TargetRegisterClass * 75 getLargestLegalSuperClass(const TargetRegisterClass *RC, 78 /// getPointerRegClass - Returns a TargetRegisterClass used for pointer 80 const TargetRegisterClass * 87 const TargetRegisterClass * [all...] |
/external/llvm/include/llvm/CodeGen/ |
RegisterClassInfo.h | 67 void compute(const TargetRegisterClass *RC) const; 70 const RCInfo &get(const TargetRegisterClass *RC) const { 86 unsigned getNumAllocatableRegs(const TargetRegisterClass *RC) const { 93 ArrayRef<MCPhysReg> getOrder(const TargetRegisterClass *RC) const { 103 bool isProperSubClass(const TargetRegisterClass *RC) const { 119 unsigned getMinCost(const TargetRegisterClass *RC) { 127 unsigned getLastCostChange(const TargetRegisterClass *RC) {
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
RegisterClassInfo.h | 71 void compute(const TargetRegisterClass *RC) const; 74 const RCInfo &get(const TargetRegisterClass *RC) const { 90 unsigned getNumAllocatableRegs(const TargetRegisterClass *RC) const { 97 ArrayRef<MCPhysReg> getOrder(const TargetRegisterClass *RC) const { 107 bool isProperSubClass(const TargetRegisterClass *RC) const { 123 unsigned getMinCost(const TargetRegisterClass *RC) { 131 unsigned getLastCostChange(const TargetRegisterClass *RC) {
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TargetRegisterInfo.h | 45 class TargetRegisterClass { 49 using sc_iterator = const TargetRegisterClass* const *; 108 /// Return true if the specified TargetRegisterClass 109 /// is a proper sub-class of this TargetRegisterClass. 110 bool hasSubClass(const TargetRegisterClass *RC) const { 115 bool hasSubClassEq(const TargetRegisterClass *RC) const { 120 /// Return true if the specified TargetRegisterClass is a 121 /// proper super-class of this TargetRegisterClass. 122 bool hasSuperClass(const TargetRegisterClass *RC) const { 127 bool hasSuperClassEq(const TargetRegisterClass *RC) const [all...] |
/external/llvm/lib/Target/AVR/ |
AVRRegisterInfo.h | 36 const TargetRegisterClass * 37 getLargestLegalSuperClass(const TargetRegisterClass *RC, 48 /// Returns a TargetRegisterClass used for pointer values. 49 const TargetRegisterClass *
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
SystemZRegisterInfo.h | 39 const TargetRegisterClass* 40 getMatchingSuperRegClass(const TargetRegisterClass *A, 41 const TargetRegisterClass *B, unsigned Idx) const;
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/external/swiftshader/third_party/LLVM/include/llvm/Target/ |
TargetRegisterInfo.h | 34 class TargetRegisterClass { 39 typedef const TargetRegisterClass* const * sc_iterator; 47 TargetRegisterClass(const MCRegisterClass *MC, const EVT *vts, 49 const TargetRegisterClass * const *supcs, 50 const TargetRegisterClass * const *superregcs) 54 virtual ~TargetRegisterClass() {} // Allow subclasses 107 /// hasType - return true if this TargetRegisterClass has the ValueType vt. 140 /// hasSubClass - return true if the specified TargetRegisterClass 141 /// is a proper sub-class of this TargetRegisterClass. 142 bool hasSubClass(const TargetRegisterClass *RC) const [all...] |
TargetSubtargetInfo.h | 24 class TargetRegisterClass; 42 typedef SmallVectorImpl<TargetRegisterClass*> RegClassVector;
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/external/llvm/lib/Target/AMDGPU/ |
SIRegisterInfo.h | 77 const TargetRegisterClass *getPointerRegClass( 90 const TargetRegisterClass *getPhysRegClass(unsigned Reg) const; 93 bool isSGPRClass(const TargetRegisterClass *RC) const { 103 const TargetRegisterClass *RC; 112 bool hasVGPRs(const TargetRegisterClass *RC) const; 117 static bool isPseudoRegClass(const TargetRegisterClass *RC) { 122 const TargetRegisterClass *getEquivalentVGPRClass( 123 const TargetRegisterClass *SRC) const; 126 const TargetRegisterClass *getEquivalentSGPRClass( 127 const TargetRegisterClass *VRC) const [all...] |
R600RegisterInfo.h | 38 const TargetRegisterClass *getCFGStructurizerRegClass(MVT VT) const; 41 getRegClassWeight(const TargetRegisterClass *RC) const override;
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/external/llvm/lib/Target/ARM/ |
ThumbRegisterInfo.h | 30 const TargetRegisterClass * 31 getLargestLegalSuperClass(const TargetRegisterClass *RC, 34 const TargetRegisterClass * 58 const TargetRegisterClass *RC,
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/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
MSP430RegisterInfo.h | 42 const TargetRegisterClass* getPointerRegClass(unsigned Kind = 0) const; 44 const TargetRegisterClass * 45 getMatchingSuperRegClass(const TargetRegisterClass *A, 46 const TargetRegisterClass *B, unsigned Idx) const {
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
ThumbRegisterInfo.h | 30 const TargetRegisterClass * 31 getLargestLegalSuperClass(const TargetRegisterClass *RC, 34 const TargetRegisterClass * 58 const TargetRegisterClass *RC,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
HexagonRegisterInfo.h | 66 bool shouldCoalesce(MachineInstr *MI, const TargetRegisterClass *SrcRC, 67 unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, 68 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override; 76 unsigned getHexagonSubRegIndex(const TargetRegisterClass &RC, 80 const TargetRegisterClass *RC) const; 84 const TargetRegisterClass *
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
SystemZRegisterInfo.h | 41 const TargetRegisterClass * 50 const TargetRegisterClass * 51 getCrossCopyRegClass(const TargetRegisterClass *RC) const override; 82 const TargetRegisterClass *SrcRC, 84 const TargetRegisterClass *DstRC, 86 const TargetRegisterClass *NewRC,
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/external/llvm/include/llvm/Target/ |
TargetRegisterInfo.h | 55 class TargetRegisterClass { 60 typedef const TargetRegisterClass* const * sc_iterator; 122 /// Return true if this TargetRegisterClass has the ValueType vt. 142 /// Return true if the specified TargetRegisterClass 143 /// is a proper sub-class of this TargetRegisterClass. 144 bool hasSubClass(const TargetRegisterClass *RC) const { 149 bool hasSubClassEq(const TargetRegisterClass *RC) const { 154 /// Return true if the specified TargetRegisterClass is a 155 /// proper super-class of this TargetRegisterClass. 156 bool hasSuperClass(const TargetRegisterClass *RC) const [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
AArch64RegisterInfo.h | 24 class TargetRegisterClass; 49 const TargetRegisterClass * 50 getSubClassWithSubReg(const TargetRegisterClass *RC, 73 const TargetRegisterClass * 76 const TargetRegisterClass * 77 getCrossCopyRegClass(const TargetRegisterClass *RC) const override; 105 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
SIRegisterInfo.h | 102 const TargetRegisterClass *getPointerRegClass( 129 const TargetRegisterClass *getPhysRegClass(unsigned Reg) const; 132 bool isSGPRClass(const TargetRegisterClass *RC) const { 142 const TargetRegisterClass *RC; 151 bool hasVGPRs(const TargetRegisterClass *RC) const; 154 const TargetRegisterClass *getEquivalentVGPRClass( 155 const TargetRegisterClass *SRC) const; 158 const TargetRegisterClass *getEquivalentSGPRClass( 159 const TargetRegisterClass *VRC) const; 164 const TargetRegisterClass *getSubRegClass(const TargetRegisterClass *RC [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
RegisterClassInfo.h | 61 void compute(const TargetRegisterClass *RC) const; 64 const RCInfo &get(const TargetRegisterClass *RC) const { 80 unsigned getNumAllocatableRegs(const TargetRegisterClass *RC) const { 87 ArrayRef<unsigned> getOrder(const TargetRegisterClass *RC) const { 97 bool isProperSubClass(const TargetRegisterClass *RC) const {
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RegisterCoalescer.h | 22 class TargetRegisterClass; 56 const TargetRegisterClass *NewRC; 102 const TargetRegisterClass *getNewRC() const { return NewRC; }
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/external/llvm/lib/CodeGen/ |
TargetRegisterInfo.cpp | 110 const TargetRegisterClass * 111 TargetRegisterInfo::getAllocatableClass(const TargetRegisterClass *RC) const { 117 const TargetRegisterClass *SubRC = getRegClass(It.getID()); 127 const TargetRegisterClass * 133 const TargetRegisterClass* BestRC = nullptr; 135 const TargetRegisterClass* RC = *I; 148 const TargetRegisterClass *RC, BitVector &R){ 156 const TargetRegisterClass *RC) const { 160 const TargetRegisterClass *SubClass = getAllocatableClass(RC); 178 const TargetRegisterClass *firstCommonClass(const uint32_t *A [all...] |
RegisterCoalescer.h | 22 class TargetRegisterClass; 57 const TargetRegisterClass *NewRC; 112 const TargetRegisterClass *getNewRC() const { return NewRC; }
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
ARMBaseRegisterInfo.h | 104 virtual const TargetRegisterClass * 105 getMatchingSuperRegClass(const TargetRegisterClass *A, 106 const TargetRegisterClass *B, unsigned Idx) const; 114 virtual bool canCombineSubRegIndices(const TargetRegisterClass *RC, 118 const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const; 119 const TargetRegisterClass* 120 getCrossCopyRegClass(const TargetRegisterClass *RC) const; 122 const TargetRegisterClass* 123 getLargestLegalSuperClass(const TargetRegisterClass *RC) const; 125 unsigned getRegPressureLimit(const TargetRegisterClass *RC [all...] |