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    Searched refs:TranslationTable (Results 1 - 5 of 5) sorted by null

  /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/
XPressRich3.c 69 UINTN TranslationTable;
89 TranslationTable = VEXPRESS_ATR_PCIE_WIN0;
92 SetTranslationAddressEntry (CpuIo, TranslationTable, ARM_JUNO_GIV2M_MSI_BASE, ARM_JUNO_GIV2M_MSI_BASE,
94 TranslationTable += PCI_ATR_ENTRY_SIZE;
97 SetTranslationAddressEntry (CpuIo, TranslationTable, PcdGet64 (PcdSystemMemoryBase), PcdGet64 (PcdSystemMemoryBase),
99 TranslationTable += PCI_ATR_ENTRY_SIZE;
100 SetTranslationAddressEntry (CpuIo, TranslationTable, ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE, ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE,
106 TranslationTable = VEXPRESS_ATR_AXI4_SLV1;
109 SetTranslationAddressEntry (CpuIo, TranslationTable, PCI_ECAM_BASE, PCI_ECAM_BASE, PCI_ECAM_SIZE, PCI_ATR_TRSLID_PCIE_CONF);
110 TranslationTable += PCI_ATR_ENTRY_SIZE;
    [all...]
  /device/linaro/bootloader/edk2/ArmPkg/Library/ArmMmuLib/Arm/
ArmMmuLibCore.c 119 UINT32 TranslationTable;
153 TranslationTable = *SectionEntry & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK;
158 TranslationTable = (UINTN)AllocatePages(EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_PAGE_SIZE + TRANSLATION_TABLE_PAGE_ALIGNMENT));
159 TranslationTable = ((UINTN)TranslationTable + TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK;
167 PageEntry = (UINT32*)TranslationTable;
173 *SectionEntry = (TranslationTable & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK) |
182 TranslationTable = (UINTN)AllocatePages(EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_PAGE_SIZE + TRANSLATION_TABLE_PAGE_ALIGNMENT));
183 TranslationTable = ((UINTN)TranslationTable + TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK;
    [all...]
  /device/linaro/bootloader/edk2/ArmPkg/Library/ArmMmuLib/AArch64/
ArmMmuLibCore.c 200 UINT64 *TranslationTable;
262 TranslationTable = RootTable;
264 BlockEntry = (UINT64*)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, IndexLevel, RegionStart);
268 TranslationTable = (UINT64*)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE);
301 TranslationTable = AllocatePages (1);
302 if (TranslationTable == NULL) {
307 SubTableBlockEntry = TranslationTable;
313 // Fill the BlockEntry with the new TranslationTable
315 ((UINTN)TranslationTable & TT_ADDRESS_MASK_DESCRIPTION_TABLE) | TableAttributes | TT_TYPE_TABLE_ENTRY);
324 TranslationTable = AllocatePages (1);
    [all...]
  /device/linaro/bootloader/edk2/ArmPkg/Include/Chipset/
AArch64Mmu.h 39 #define TT_GET_ENTRY_FOR_ADDRESS(TranslationTable, Level, Address) \
40 ((UINTN)(TranslationTable) + ((((UINTN)(Address) >> TT_ADDRESS_OFFSET_AT_LEVEL(Level)) & (BIT9-1)) * sizeof(UINT64)))
46 #define TT_LAST_BLOCK_ADDRESS(TranslationTable, EntryCount) \
47 ((UINT64*)((EFI_PHYSICAL_ADDRESS)(TranslationTable) + (((EntryCount) - 1) * sizeof(UINT64))))
  /device/linaro/bootloader/edk2/ArmPkg/Drivers/CpuDxe/AArch64/
Mmu.c 243 IN UINT64 *TranslationTable,
264 BlockEntry = (UINT64*)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, *BaseAddress);
306 // If we have reached the end of the TranslationTable and we have not found the end of the region then
320 UINT64 *TranslationTable;
327 TranslationTable = ArmGetTTBR0BaseAddress ();
333 Status = GetMemoryRegionRec (TranslationTable, TableLevel,
334 (UINTN*)TT_LAST_BLOCK_ADDRESS(TranslationTable, EntryCount),

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