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    Searched refs:UDCCR (Results 1 - 2 of 2) sorted by null

  /external/u-boot/drivers/usb/gadget/
pxa27x_udc.c 391 writel(readl(UDCCR) | UDCCR_SMAC, UDCCR);
394 (readl(UDCCR) & UDCCR_ACN) >> UDCCR_ACN_S,
395 (readl(UDCCR) & UDCCR_AIN) >> UDCCR_AIN_S,
396 (readl(UDCCR) & UDCCR_AAISN) >> UDCCR_AAISN_S);
470 /* The UDCCR reg contains mask and interrupt status bits,
478 writel((readl(UDCCR) & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS), UDCCR);
483 writel((readl(UDCCR) & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS), UDCCR);
    [all...]
  /external/u-boot/arch/arm/include/asm/arch-pxa/
pxa-regs.h 443 #define UDCCR 0x40600000 /* UDC Control Register */
    [all...]

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