| /external/u-boot/arch/x86/include/asm/arch-baytrail/acpi/ |
| southcluster.asl | 150 CreateQwordField(MCRS, ^UMEM._MAX, UMAX)
156 Add(UMIN, Subtract(ULEN, 1), UMAX)
|
| /device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Tools/scripts/ |
| h2py.py | 101 UMAX = 2*(sys.maxint+1)
108 val -= UMAX
|
| /external/python/cpython2/Tools/scripts/ |
| h2py.py | 107 UMAX = 2*(sys.maxint+1)
114 val -= UMAX
|
| /external/python/cpython3/Tools/scripts/ |
| h2py.py | 98 UMAX = 2*(sys.maxsize+1)
105 val -= UMAX
|
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_opcode_tmp.h | 140 OP12(UMAX)
|
| tgsi_info_opcodes.h | 133 OPCODE(1, 2, COMP, UMAX)
|
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 325 SMIN, SMAX, UMIN, UMAX,
[all...] |
| SelectionDAG.h | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 360 SMIN, SMAX, UMIN, UMAX,
[all...] |
| /external/virglrenderer/src/gallium/auxiliary/tgsi/ |
| tgsi_opcode_tmp.h | 168 OP12(UMAX)
|
| /external/llvm/lib/Target/X86/ |
| X86IntrinsicsInfo.h | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 210 case ISD::UMAX: return "umax";
|
| LegalizeIntegerTypes.cpp | 81 case ISD::UMAX: Res = PromoteIntRes_ZExtIntBinOp(N); break;
[all...] |
| LegalizeVectorOps.cpp | 334 case ISD::UMAX:
[all...] |
| LegalizeVectorTypes.cpp | 117 case ISD::UMAX:
695 case ISD::UMAX:
[all...] |
| SelectionDAG.cpp | [all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIISelLowering.cpp | 228 setTargetDAGCombine(ISD::UMAX);
[all...] |
| /external/mesa3d/src/broadcom/compiler/ |
| v3d_compiler.h | 824 VIR_A_ALU2(UMAX)
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 250 case ISD::UMAX: return "umax";
[all...] |
| LegalizeIntegerTypes.cpp | 83 case ISD::UMAX: Res = PromoteIntRes_ZExtIntBinOp(N); break;
[all...] |
| LegalizeVectorOps.cpp | 393 case ISD::UMAX:
[all...] |
| LegalizeVectorTypes.cpp | 121 case ISD::UMAX:
752 case ISD::UMAX:
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| SIISelLowering.cpp | 406 setOperationAction(ISD::UMAX, MVT::i16, Legal);
564 setOperationAction(ISD::UMAX, MVT::v2i16, Legal);
586 setOperationAction(ISD::UMAX, MVT::v4i16, Custom);
630 setTargetDAGCombine(ISD::UMAX);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 343 setOperationAction(ISD::UMAX, Ty, Legal);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | 608 setOperationAction(ISD::UMAX, VT, Expand);
[all...] |
