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    Searched refs:UartBase (Results 1 - 11 of 11) sorted by null

  /device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/PL011Uart/
PL011Uart.c 39 @param UartBase The base address of the serial device.
69 IN UINTN UartBase,
84 HardwareFifoDepth = (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) \
202 if (((MmioRead32 (UartBase + UARTCR) & PL011_UARTCR_UARTEN) != 0) &&
203 (MmioRead32 (UartBase + UARTLCR_H) == LineControl) &&
204 (MmioRead32 (UartBase + UARTIBRD) == Integer) &&
205 (MmioRead32 (UartBase + UARTFBRD) == Fractional)) {
211 while ((MmioRead32 (UartBase + UARTFR) & PL011_UARTFR_TXFE) == 0);
215 MmioWrite32 (UartBase + UARTCR, 0);
218 MmioWrite32 (UartBase + UARTIBRD, Integer);
    [all...]
  /device/linaro/bootloader/edk2/Omap35xxPkg/Library/GdbSerialLib/
GdbSerialLib.c 51 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
66 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
67 UINT32 RBR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_RBR_REG;
82 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
83 UINT32 THR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_THR_REG;
  /device/linaro/bootloader/edk2/Omap35xxPkg/Include/Library/
OmapLib.h 38 UartBase (
  /device/linaro/bootloader/edk2/Omap35xxPkg/Library/SerialPortLib/
SerialPortLib.c 60 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
61 UINT32 THR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_THR_REG;
90 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
91 UINT32 RBR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_RBR_REG;
117 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
  /device/linaro/bootloader/edk2/ArmPlatformPkg/Include/Drivers/
PL011Uart.h 97 @param[in] UartBase The base address of the serial device.
127 IN UINTN UartBase,
143 @param[in] UartBase UART registers base address
166 IN UINTN UartBase,
174 @param[in] UartBase UART registers base address
206 IN UINTN UartBase,
223 IN UINTN UartBase,
241 IN UINTN UartBase,
256 IN UINTN UartBase
  /device/linaro/bootloader/edk2/ArmVirtPkg/Library/PlatformPeiLib/
PlatformPeiLib.c 44 UINT64 UartBase;
89 UartBase = fdt64_to_cpu (ReadUnaligned64 (RegProp));
91 DEBUG ((EFI_D_INFO, "%a: PL011 UART @ 0x%lx\n", __FUNCTION__, UartBase));
93 *UartHobData = UartBase;
  /device/linaro/bootloader/OpenPlatformPkg/Platforms/ARM/Juno/AcpiTables/
Dbg2.aslc 45 #define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen, UartNameStr) { \
60 ARM_GAS32 (UartBase), /* EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \
  /device/linaro/bootloader/edk2/ArmVirtPkg/Library/FdtPL011SerialPortLib/
EarlyFdtPL011SerialPortLib.c 71 UINTN UartBase;
105 UartBase = (UINTN)fdt64_to_cpu (ReadUnaligned64 (RegProperty));
114 UartBase,
123 return UartBase;
FdtPL011SerialPortLib.c 59 CONST UINT64 *UartBase;
67 if (Hob == NULL || GET_GUID_HOB_DATA_SIZE (Hob) != sizeof *UartBase) {
70 UartBase = GET_GUID_HOB_DATA (Hob);
72 mSerialBaseAddress = (UINTN)*UartBase;
  /device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/AcpiTables/
Dbg2.c 52 #define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen, UartNameStr) { \
67 AMD_GASN (UartBase), /* EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \
  /device/linaro/bootloader/edk2/Omap35xxPkg/Library/OmapLib/
OmapLib.c 72 UartBase (

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