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Searched
refs:Width1
(Results
1 - 5
of
5
) sorted by null
/external/llvm/lib/Target/AMDGPU/
R600ISelLowering.cpp
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SIInstrInfo.cpp
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
R600ISelLowering.cpp
800
SDValue
Width1
= DAG.getConstant(VT.getSizeInBits() - 1, DL, VT);
802
SDValue CompShift = DAG.getNode(ISD::SUB, DL, VT,
Width1
, Shift);
804
// The dance around
Width1
is necessary for 0 special case.
838
SDValue
Width1
= DAG.getConstant(VT.getSizeInBits() - 1, DL, VT);
840
SDValue CompShift = DAG.getNode(ISD::SUB, DL, VT,
Width1
, Shift);
842
// The dance around
Width1
is necessary for 0 special case.
855
SDValue HiBig = SRA ? DAG.getNode(ISD::SRA, DL, VT, Hi,
Width1
) : Zero;
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SIInstrInfo.cpp
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...]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
LegalizeDAG.cpp
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all
...]
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