/external/swiftshader/third_party/LLVM/lib/TableGen/ |
TGLexer.h | 48 XConcat, XSRA, XSRL, XSHL, XStrConcat, XCast, XSubst,
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TGLexer.cpp | 424 .Case("sra", tgtok::XSRA)
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TGParser.cpp | 800 case tgtok::XSRA: 815 case tgtok::XSRA: Code = BinOpInit::SRA; Type = IntRecTy::get(); break; [all...] |
/external/llvm/lib/TableGen/ |
TGLexer.h | 50 XConcat, XADD, XAND, XSRA, XSRL, XSHL, XListConcat, XStrConcat, XCast,
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TGLexer.cpp | 476 .Case("sra", tgtok::XSRA)
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TGParser.cpp | 874 case tgtok::XSRA: 892 case tgtok::XSRA: Code = BinOpInit::SRA; Type = IntRecTy::get(); break; [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/TableGen/ |
TGLexer.h | 50 XConcat, XADD, XAND, XOR, XSRA, XSRL, XSHL, XListConcat, XStrConcat, XCast,
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TGLexer.cpp | 486 .Case("sra", tgtok::XSRA)
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TGParser.cpp | 1029 case tgtok::XSRA: [all...] |
/external/u-boot/arch/arm/include/asm/arch-imx/ |
imx-regs.h | 343 #define XSRA __REG(IMX_DMAC_BASE +0x44) /* X-Size Register A */
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