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  /external/u-boot/arch/arm/mach-exynos/
dmc_common.c 55 while ((readl(phy0_con17) & ZQ_DONE) != ZQ_DONE && i > 0) {
64 while ((readl(phy1_con17) & ZQ_DONE) != ZQ_DONE && i > 0) {
exynos5_setup.h 324 #define ZQ_DONE (1 << 0)

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