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  /external/llvm/test/MC/Mips/
mips-reginfo-fp64.s 59 add_a.b $w26,$w26,$w26
60 add_a.b $w27,$w27,$w27
  /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
mips-reginfo-fp64.s 59 add_a.b $w26,$w26,$w26
60 add_a.b $w27,$w27,$w27
  /external/mesa3d/src/gallium/drivers/vc4/kernel/
vc4_validate_shaders.c 116 uint32_t add_a = QPU_GET_FIELD(inst, QPU_ADD_A); local
120 if (add_a == QPU_MUX_A)
122 else if (add_a == QPU_MUX_B && sig != QPU_SIG_SMALL_IMM)
124 else if (add_a <= QPU_MUX_R3)
125 return 64 + add_a;
476 uint32_t add_a = QPU_GET_FIELD(inst, QPU_ADD_A); local
519 (add_a != QPU_MUX_B && add_b != QPU_MUX_B)) {
  /external/mesa3d/src/gallium/drivers/vc4/
vc4_qpu.c 407 uint32_t add_a = QPU_GET_FIELD(*inst, QPU_ADD_A); local
413 (add_a != QPU_GET_FIELD(*inst, QPU_ADD_B))) {
427 *inst = QPU_UPDATE_FIELD(*inst, add_a, QPU_MUL_A);
428 *inst = QPU_UPDATE_FIELD(*inst, add_a, QPU_MUL_B);
vc4_qpu_schedule.c 358 uint32_t add_a = QPU_GET_FIELD(inst, QPU_ADD_A); local
372 process_mux_deps(state, n, add_a);
    [all...]
  /external/llvm/test/MC/Mips/msa/
test_3r.s 3 # CHECK: add_a.b $w26, $w9, $w4 # encoding: [0x78,0x04,0x4e,0x90]
4 # CHECK: add_a.h $w23, $w27, $w31 # encoding: [0x78,0x3f,0xdd,0xd0]
5 # CHECK: add_a.w $w11, $w6, $w22 # encoding: [0x78,0x56,0x32,0xd0]
6 # CHECK: add_a.d $w6, $w10, $w0 # encoding: [0x78,0x60,0x51,0x90]
246 add_a.b $w26, $w9, $w4
247 add_a.h $w23, $w27, $w31
248 add_a.w $w11, $w6, $w22
249 add_a.d $w6, $w10, $w0
    [all...]
  /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/msa/
test_3r.s 3 # CHECK: add_a.b $w26, $w9, $w4 # encoding: [0x78,0x04,0x4e,0x90]
4 # CHECK: add_a.h $w23, $w27, $w31 # encoding: [0x78,0x3f,0xdd,0xd0]
5 # CHECK: add_a.w $w11, $w6, $w22 # encoding: [0x78,0x56,0x32,0xd0]
6 # CHECK: add_a.d $w6, $w10, $w0 # encoding: [0x78,0x60,0x51,0x90]
246 add_a.b $w26, $w9, $w4
247 add_a.h $w23, $w27, $w31
248 add_a.w $w11, $w6, $w22
249 add_a.d $w6, $w10, $w0
    [all...]
  /external/capstone/suite/MC/Mips/
test_3r.s.cs 2 0x78,0x04,0x4e,0x90 = add_a.b $w26, $w9, $w4
3 0x78,0x3f,0xdd,0xd0 = add_a.h $w23, $w27, $w31
4 0x78,0x56,0x32,0xd0 = add_a.w $w11, $w6, $w22
5 0x78,0x60,0x51,0x90 = add_a.d $w6, $w10, $w0
  /external/v8/src/mips/
disasm-mips.cc     [all...]
assembler-mips.cc     [all...]
  /external/v8/src/mips64/
assembler-mips64.cc     [all...]

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