| /external/mesa3d/src/gallium/winsys/radeon/drm/ |
| radeon_drm_surface.c | 152 surf_drm->bankh = surf_ws->u.legacy.bankh;
194 surf_ws->u.legacy.bankh = surf_drm->bankh;
|
| radeon_drm_bo.c | 864 md->u.legacy.bankh = (args.tiling_flags >> RADEON_TILING_EG_BANKH_SHIFT) & RADEON_TILING_EG_BANKH_MASK;
893 args.tiling_flags |= (md->u.legacy.bankh & RADEON_TILING_EG_BANKH_MASK) <<
[all...] |
| /external/mesa3d/src/gallium/drivers/r600/ |
| radeon_video.c | 160 wh = surfaces[i]->u.legacy.bankw * surfaces[i]->u.legacy.bankh;
176 surfaces[i]->u.legacy.bankh = surfaces[best_tiling]->u.legacy.bankh;
|
| evergreen_state.c | 719 unsigned macro_aspect, tile_split, bankh, bankw, nbanks, fmask_bankh; local
799 bankh = tmp->surface.u.legacy.bankh;
803 bankh = eg_bank_wh(bankh);
887 S_03001C_BANK_HEIGHT(bankh) |
1109 unsigned non_disp_tiling, macro_aspect, tile_split, bankh, bankw, fmask_bankh, nbanks; local
1345 unsigned macro_aspect, tile_split, bankh, bankw, nbanks; local
[all...] |
| r600_texture.c | 286 metadata->u.legacy.bankh = surface->u.legacy.bankh;
302 surf->u.legacy.bankh = metadata->u.legacy.bankh;
592 fmask.u.legacy.bankh = rtex->surface.u.legacy.bankh;
597 fmask.u.legacy.bankh = 4;
633 out->bank_height = fmask.u.legacy.bankh;
821 "bankh=%u, nbanks=%u, mtilea=%u, tilesplit=%u, pipeconfig=%u, scanout=%u\n",
823 rtex->surface.u.legacy.bankh, rtex->surface.u.legacy.num_banks, rtex->surface.u.legacy.mtilea
[all...] |
| radeon_uvd.c | [all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| radeon_video.c | 153 wh = surfaces[i]->u.legacy.bankw * surfaces[i]->u.legacy.bankh;
171 surfaces[i]->u.legacy.bankh = surfaces[best_tiling]->u.legacy.bankh;
|
| radeon_winsys.h | 193 unsigned bankh; member in struct:radeon_bo_metadata::__anon33550::__anon33551
|
| r600_texture.c | 341 metadata->u.legacy.bankh = surface->u.legacy.bankh;
369 surf->u.legacy.bankh = metadata->u.legacy.bankh;
882 out->bank_height = fmask.u.legacy.bankh;
[all...] |
| radeon_uvd.c | [all...] |
| /external/libdrm/radeon/ |
| radeon_surface.h | 124 * overridden (things lile bankw/bankh on evergreen for
131 uint32_t bankh; member in struct:radeon_surface
|
| radeon_surface.c | 676 mtileh = (tileh * surf->bankh * surf_man->hw_info.num_banks) / surf->mtilea;
770 switch (surf->bankh) {
780 if ((tileb * surf->bankh * surf->bankw) < surf_man->hw_info.group_bytes) {
905 /* compute best tile_split, bankw, bankh, mtilea
920 surf->bankh = 1;
923 for (; surf->bankh <= 8; surf->bankh *= 2) {
924 if ((tileb * surf->bankh * surf->bankw) >= surf_man->hw_info.group_bytes) {
978 /* bankw or bankh greater than 1 increase alignment requirement, not
979 * sure if it's worth using smaller bankw & bankh to stick with 2
[all...] |
| /external/mesa3d/src/amd/common/ |
| ac_surface.h | 84 unsigned bankh:4; /* max 8 */ member in struct:legacy_surf_layout
171 * they will be treated as hints (e.g. bankw, bankh) and might be
|
| ac_surface.c | 433 surf->u.legacy.bankh = csio->pTileInfo->bankHeight;
629 surf->u.legacy.bankw && surf->u.legacy.bankh &&
637 AddrTileInfoIn.bankHeight = surf->u.legacy.bankh;
[all...] |
| /external/mesa3d/src/amd/vulkan/ |
| radv_radeon_winsys.h | 137 unsigned bankh; member in struct:radeon_bo_metadata::__anon32959::__anon32960
|
| radv_image.c | 640 metadata->u.legacy.bankh = surface->u.legacy.bankh;
703 out->bank_height = fmask.u.legacy.bankh;
[all...] |
| radv_device.c | 3274 unsigned bankh = util_logbase2(iview->image->surface.u.legacy.bankh); local
[all...] |
| /external/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
| radv_amdgpu_bo.c | 519 tiling_flags |= AMDGPU_TILING_SET(BANK_HEIGHT, util_logbase2(md->u.legacy.bankh));
|
| /external/mesa3d/src/gallium/winsys/amdgpu/drm/ |
| amdgpu_bo.c | [all...] |
| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| si_state.c | 2477 unsigned bankh = util_logbase2(rtex->surface.u.legacy.bankh); local
[all...] |
