| /external/u-boot/drivers/ddr/marvell/a38x/ |
| ddr3_init.c | 122 u32 bus_cnt, num_of_active_bus = 0; local
130 for (bus_cnt = 0; bus_cnt < octets_per_if_num - 1/* ignore ecc octet */; bus_cnt++) {
131 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt);
|
| ddr3_training.c | 317 u32 bus_cnt; local
324 for (bus_cnt = 0; bus_cnt < octets_per_if_num; bus_cnt++) {
325 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt);
328 as_bus_params[bus_cnt].cs_bitmask;
339 if_id, bus_cnt, cs_count,
362 u32 bus_cnt = 0, adll_tap = 0; local
494 for (bus_cnt = 0;
495 bus_cnt < octets_per_if_num
697 u32 data_value = 0, bus_cnt = 0; local
751 u32 data_value = 0, bus_cnt; local
795 u32 bus_cnt, data_value, ck_swap_pup_ctrl; local
1188 u32 bus_cnt = 0; local
1261 bus_cnt = 0, t_wr = 0, t_ckclk = 0, local
[all...] |
| ddr3_training_leveling.c | 794 u32 bus_cnt; local
809 for (bus_cnt = 0; bus_cnt < octets_per_if_num; bus_cnt++) {
810 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt);
813 as_bus_params[bus_cnt].cs_bitmask;
815 as_bus_params[bus_cnt].cs_bitmask;
819 as_bus_params[bus_cnt].cs_bitmask;
833 u32 reg_data = 0, temp = 0, iter, if_id, bus_cnt; local
952 for (bus_cnt = 0; bus_cnt < octets_per_if_num; bus_cnt++)
[all...] |
| ddr3_training_ip_engine.c | 1458 u32 bus_cnt = 0, if_id, dev_num = 0; local
[all...] |
| ddr3_debug.c | 851 u32 bus_cnt = 0, if_id, data_p1, data_p2, ui_data3, dev_num = 0; local
857 for (bus_cnt = 0; bus_cnt < octets_per_if_num;
858 bus_cnt++) {
859 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt);
862 ACCESS_TYPE_UNICAST, bus_cnt,
866 bus_cnt, DDR_PHY_DATA, 0x2, &data_p2));
869 bus_cnt, DDR_PHY_DATA, 0x3, &ui_data3));
871 (" IF %d bus_cnt %d phy_reg_1_data 0x%x phy_reg_2_data 0x%x phy_reg_3_data 0x%x\n",
872 if_id, bus_cnt, data_p1, data_p2
[all...] |
