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    Searched refs:cfg_tmp (Results 1 - 2 of 2) sorted by null

  /external/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
fsl_lsch3_serdes.c 227 u32 cfg_tmp; local
235 cfg_tmp = cfg & srds_prctl_info[pos].mask;
236 cfg_tmp >>= srds_prctl_info[pos].shift;
238 for (i = 0; i < 4 && cfg_tmp & (0xf << (3 - i)); i++) {
344 u32 cfg_tmp; local
376 cfg_tmp = cfg_rcwsrds1 & 0x3;
377 do_pll_reset(cfg_tmp, serdes1_base);
381 cfg_tmp = cfg_rcwsrds1 & 0xC;
382 cfg_tmp >>= 2;
383 do_pll_reset(cfg_tmp, serdes2_base)
    [all...]
fsl_lsch2_serdes.c 150 u32 cfg_tmp, reg = 0; local
176 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK;
177 cfg_tmp >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT;
179 for (i = 0; i < 4 && cfg_tmp & (0xf << (3 - i)); i++) {
186 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK;
187 cfg_tmp >>= FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_SHIFT;
189 for (i = 0; i < 4 && cfg_tmp & (0xf << (3 - i)); i++) {
198 cfg_tmp = (cfg_rcw5 >> 22) & 0x3;
199 for (i = 0; i < 2 && !(cfg_tmp & (0x1 << (1 - i))); i++) {
214 cfg_tmp = (cfg_rcw5 >> 20) & 0x3
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