| /external/u-boot/include/ |
| mailbox-uclass.h | 33 * @chan: The channel to hold the translation result.
37 int (*of_xlate)(struct mbox_chan *chan,
46 * @chan: The channel to request; this has been filled in by a
50 int (*request)(struct mbox_chan *chan);
56 * @chan: The channel to free.
59 int (*free)(struct mbox_chan *chan);
63 * @chan: The channel to send to the message to.
67 int (*send)(struct mbox_chan *chan, const void *data);
74 * @chan: The channel to receive to the message from.
79 int (*recv)(struct mbox_chan *chan, void *data)
[all...] |
| mailbox.h | 79 * @chan A pointer to a channel object to initialize.
82 int mbox_get_by_index(struct udevice *dev, int index, struct mbox_chan *chan);
97 * @chan A pointer to a channel object to initialize.
101 struct mbox_chan *chan);
106 * @chan: A channel object that was previously successfully requested by
110 int mbox_free(struct mbox_chan *chan);
118 * @chan: A channel object that was previously successfully requested by
126 int mbox_send(struct mbox_chan *chan, const void *data);
135 * @chan: A channel object that was previously successfully requested by
146 int mbox_recv(struct mbox_chan *chan, void *data, ulong timeout_us)
[all...] |
| /external/u-boot/drivers/pwm/ |
| sandbox_pwm.c | 25 struct sandbox_pwm_chan chan[NUM_CHANNELS]; member in struct:sandbox_pwm_priv
32 struct sandbox_pwm_chan *chan; local
36 chan = &priv->chan[channel];
37 chan->period_ns = period_ns;
38 chan->duty_ns = duty_ns;
47 struct sandbox_pwm_chan *chan; local
51 chan = &priv->chan[channel];
52 chan->enable = enable
61 struct sandbox_pwm_chan *chan; local
[all...] |
| /external/u-boot/drivers/mailbox/ |
| mailbox-uclass.c | 16 static int mbox_of_xlate_default(struct mbox_chan *chan,
19 debug("%s(chan=%p)\n", __func__, chan);
26 chan->id = args->args[0];
31 int mbox_get_by_index(struct udevice *dev, int index, struct mbox_chan *chan)
38 debug("%s(dev=%p, index=%d, chan=%p)\n", __func__, dev, index, chan);
56 chan->dev = dev_mbox;
58 ret = ops->of_xlate(chan, &args);
60 ret = mbox_of_xlate_default(chan, &args)
[all...] |
| sandbox-mbox.c | 23 static int sandbox_mbox_request(struct mbox_chan *chan)
25 debug("%s(chan=%p)\n", __func__, chan);
27 if (chan->id >= SANDBOX_MBOX_CHANNELS)
33 static int sandbox_mbox_free(struct mbox_chan *chan)
35 debug("%s(chan=%p)\n", __func__, chan);
40 static int sandbox_mbox_send(struct mbox_chan *chan, const void *data)
42 struct sandbox_mbox *sbm = dev_get_priv(chan->dev);
45 debug("%s(chan=%p, data=%p)\n", __func__, chan, data)
[all...] |
| sandbox-mbox-test.c | 12 struct mbox_chan chan; member in struct:sandbox_mbox_test
19 return mbox_get_by_name(dev, "test", &sbmt->chan);
26 return mbox_send(&sbmt->chan, &msg);
33 return mbox_recv(&sbmt->chan, msg, 100);
40 return mbox_free(&sbmt->chan);
|
| tegra-hsp.c | 71 static int tegra_hsp_of_xlate(struct mbox_chan *chan,
74 debug("%s(chan=%p)\n", __func__, chan);
81 chan->id = (args->args[0] << 16) | args->args[1];
86 static int tegra_hsp_request(struct mbox_chan *chan)
90 debug("%s(chan=%p)\n", __func__, chan);
92 db_id = tegra_hsp_db_id(chan->id);
101 static int tegra_hsp_free(struct mbox_chan *chan)
103 debug("%s(chan=%p)\n", __func__, chan)
[all...] |
| /external/u-boot/drivers/ddr/marvell/axp/ |
| xor.c | 20 static int mv_xor_cmd_set(u32 chan, int command);
21 static int mv_xor_ctrl_set(u32 chan, u32 xor_ctrl);
140 static int mv_xor_ctrl_set(u32 chan, u32 xor_ctrl)
145 val = reg_read(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan)))
149 reg_write(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan)), xor_ctrl);
154 int mv_xor_mem_init(u32 chan, u32 start_ptr, u32 block_size, u32 init_val_high,
160 if (chan >= MV_XOR_MAX_CHAN)
163 if (MV_ACTIVE == mv_xor_state_get(chan))
[all...] |
| xor_regs.h | 13 #define XOR_UNIT(chan) ((chan) >> 1)
14 #define XOR_CHAN(chan) ((chan) & 1)
21 #define XOR_CONFIG_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x10 + ((chan) * 4)))
22 #define XOR_ACTIVATION_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x20 + ((chan) * 4)))
31 #define XOR_NEXT_DESC_PTR_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x200 + ((chan) * 4))
[all...] |
| xor.h | 63 int mv_xor_state_get(u32 chan);
66 int mv_xor_transfer(u32 chan, int xor_type, u32 xor_chain_ptr);
67 int mv_xor_mem_init(u32 chan, u32 start_ptr, u32 block_size, u32 init_val_high,
|
| /external/u-boot/drivers/ddr/marvell/a38x/ |
| xor.c | 150 int mv_xor_ctrl_set(u32 chan, u32 xor_ctrl)
155 old_value = reg_read(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan))) &
159 reg_write(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan)), xor_ctrl);
164 int mv_xor_mem_init(u32 chan, u32 start_ptr, unsigned long long block_size,
173 if (chan >= MV_XOR_MAX_CHAN)
176 if (MV_ACTIVE == mv_xor_state_get(chan))
184 temp = reg_read(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan)));
[all...] |
| xor_regs.h | 13 #define XOR_UNIT(chan) ((chan) >> 1)
14 #define XOR_CHAN(chan) ((chan) & 1)
21 #define XOR_CONFIG_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + \
22 (0x10 + ((chan) * 4)))
23 #define XOR_ACTIVATION_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + \
24 (0x20 + ((chan) * 4)))
33 #define XOR_NEXT_DESC_PTR_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + \
34 (0x200 + ((chan) * 4))
[all...] |
| xor.h | 82 enum mv_state mv_xor_state_get(u32 chan);
84 int mv_xor_ctrl_set(u32 chan, u32 xor_ctrl);
85 int mv_xor_command_set(u32 chan, enum mv_command command);
86 int mv_xor_override_set(u32 chan, enum xor_override_target target, u32 win_num,
88 int mv_xor_transfer(u32 chan, enum xor_type type, u32 xor_chain_ptr);
|
| /external/grpc-grpc/test/core/surface/ |
| channel_create_test.cc | 30 grpc_channel* chan; local
35 chan = grpc_insecure_channel_create("blah://blah", nullptr, nullptr);
36 GPR_ASSERT(chan != nullptr);
40 grpc_channel_stack_element(grpc_channel_get_channel_stack(chan), 0);
43 grpc_channel_destroy(chan);
|
| secure_channel_create_test.cc | 35 grpc_channel* chan = local
38 grpc_channel_stack_element(grpc_channel_get_channel_stack(chan), 0);
41 GRPC_CHANNEL_INTERNAL_UNREF(chan, "test");
53 grpc_channel* chan = local
56 grpc_channel_stack_element(grpc_channel_get_channel_stack(chan), 0);
59 GRPC_CHANNEL_INTERNAL_UNREF(chan, "test");
63 grpc_channel* chan = local
66 grpc_channel_stack_element(grpc_channel_get_channel_stack(chan), 0);
69 GRPC_CHANNEL_INTERNAL_UNREF(chan, "test");
|
| /external/wpa_supplicant_8/src/ap/ |
| acs.c | 249 static void acs_clean_chan_surveys(struct hostapd_channel_data *chan)
253 if (dl_list_empty(&chan->survey_list))
256 dl_list_for_each_safe(survey, tmp, &chan->survey_list,
267 struct hostapd_channel_data *chan; local
270 chan = &iface->current_mode->channels[i];
272 if (chan->flag & HOSTAPD_CHAN_SURVEY_LIST_INITIALIZED)
273 acs_clean_chan_surveys(chan);
275 dl_list_init(&chan->survey_list);
276 chan->flag |= HOSTAPD_CHAN_SURVEY_LIST_INITIALIZED;
277 chan->min_nf = 0
459 struct hostapd_channel_data *chan; local
496 struct hostapd_channel_data *chan; local
521 struct hostapd_channel_data *chan; local
577 struct hostapd_channel_data *chan, *adj_chan, *ideal_chan = NULL, local
923 struct hostapd_channel_data *chan; local
[all...] |
| /external/tensorflow/tensorflow/lite/experimental/micro/examples/micro_speech/micro_features/ |
| filterbank_util.cc | 117 int chan; local
118 for (chan = 0; chan < num_channels_plus_1; ++chan) {
121 while (FreqToMel((freq_index)*hz_per_sbin) <= center_mel_freqs[chan]) {
126 actual_channel_starts[chan] = chan_freq_index_start;
127 actual_channel_widths[chan] = width;
136 state->channel_frequency_starts[chan] = 0;
137 state->channel_weight_starts[chan] = 0;
138 state->channel_widths[chan] = kFilterbankChannelBlockSize
[all...] |
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| radeon_dataflow_swizzles.c | 48 for(unsigned int chan = 0; chan < 4; ++chan) {
49 if (GET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan) != RC_SWIZZLE_UNUSED)
50 usemask |= 1 << chan;
68 for(unsigned int chan = 0; chan < 4; ++chan) {
69 if (!GET_BIT(split.Phase[phase], chan))
70 SET_SWZ(mov->U.I.SrcReg[0].Swizzle, chan, RC_SWIZZLE_UNUSED)
104 unsigned new_swizzle, chan, swz0, swz1, swz2, swz3, found_swizzle, swz; local
[all...] |
| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| lp_bld_tgsi_info.c | 64 unsigned chan)
68 unsigned swizzle = tgsi_util_get_src_register_swizzle(src, chan);
111 unsigned chan; local
172 for (chan = 0; chan < 4; ++chan) {
173 struct lp_tgsi_channel_info *chan_info = &tex_info->coord[chan];
174 if (readmask & (1 << chan)) {
175 analyse_src(ctx, chan_info, &inst->Src[0].Register, chan);
207 unsigned chan; local
292 unsigned chan; local
466 unsigned chan; local
534 unsigned chan; local
[all...] |
| /external/tensorflow/tensorflow/lite/experimental/microfrontend/lib/ |
| filterbank_util.c | 114 int chan; local
115 for (chan = 0; chan < num_channels_plus_1; ++chan) {
118 while (FreqToMel((freq_index) * hz_per_sbin) <= center_mel_freqs[chan]) {
123 actual_channel_starts[chan] = chan_freq_index_start;
124 actual_channel_widths[chan] = width;
133 state->channel_frequency_starts[chan] = 0;
134 state->channel_weight_starts[chan] = 0;
135 state->channel_widths[chan] = kFilterbankChannelBlockSize
[all...] |
| /external/wpa_supplicant_8/src/common/ |
| ieee802_11_common.c | 957 static int ieee80211_chan_to_freq_us(u8 op_class, u8 chan)
963 if (chan < 1 || chan > 11)
965 return 2407 + 5 * chan;
972 if (chan < 36 || chan > 64)
974 return 5000 + 5 * chan;
977 if (chan < 100 || chan > 144)
979 return 5000 + 5 * chan;
[all...] |
| hw_features_common.h | 16 int chan, int *freq);
18 int freq, int *chan);
20 int hw_get_freq(struct hostapd_hw_modes *mode, int chan);
43 int chan_bw_allowed(const struct hostapd_channel_data *chan, u32 bw,
45 int chan_pri_allowed(const struct hostapd_channel_data *chan);
|
| /external/mesa3d/src/mesa/main/ |
| format_info.py | 74 for chan in fmat.channels:
75 if chan.type == 'x' and len(fmat.channels) > 1:
77 elif chan.name == 's' and fmat.has_channel('z'):
80 channel = chan
131 for chan in fmat.channels:
132 if chan.name == chan_name:
133 return chan.size
196 chan = fmat.array_element()
197 norm = chan.norm or chan.type == parser.FLOA
[all...] |
| /external/u-boot/arch/arm/include/asm/arch-omap3/ |
| dma.h | 11 int omap3_dma_conf_transfer(uint32_t chan, uint32_t *src, uint32_t *dst,
13 int omap3_dma_start_transfer(uint32_t chan);
14 int omap3_dma_wait_for_transfer(uint32_t chan);
15 int omap3_dma_conf_chan(uint32_t chan, struct dma4_chan *config);
16 int omap3_dma_get_conf_chan(uint32_t chan, struct dma4_chan *config);
|
| /external/mesa3d/src/gallium/drivers/vc4/ |
| vc4_nir_lower_io.c | 56 vc4_nir_unpack_8i(nir_builder *b, nir_ssa_def *src, unsigned chan)
60 nir_imm_int(b, 8 * chan),
66 vc4_nir_unpack_16i(nir_builder *b, nir_ssa_def *src, unsigned chan)
70 nir_imm_int(b, 16 * chan),
76 vc4_nir_unpack_16u(nir_builder *b, nir_ssa_def *src, unsigned chan)
78 if (chan == 0) {
86 vc4_nir_unpack_8f(nir_builder *b, nir_ssa_def *src, unsigned chan)
88 return nir_channel(b, nir_unpack_unorm_4x8(b, src), chan);
98 const struct util_format_channel_description *chan = local
104 } else if (chan->size == 32 && chan->type == UTIL_FORMAT_TYPE_FLOAT)
[all...] |
