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    Searched refs:clock_set_pll3 (Results 1 - 7 of 7) sorted by null

  /external/u-boot/drivers/video/sunxi/
lcdc.c 283 clock_set_pll3(297000000); /* Fix the video pll at 297 MHz */
290 clock_set_pll3(best_n * 3000000);
sunxi_dw_hdmi.c 334 clock_set_pll3(297000000);
sunxi_display.c 98 clock_set_pll3(300000000);
137 clock_set_pll3(0);
    [all...]
  /external/u-boot/arch/arm/mach-sunxi/
clock_sun4i.c 182 void clock_set_pll3(unsigned int clk) function
clock_sun6i.c 148 void clock_set_pll3(unsigned int clk) function
  /external/u-boot/arch/arm/include/asm/arch-sunxi/
clock_sun4i.h 356 void clock_set_pll3(unsigned int hz);
clock_sun6i.h 514 void clock_set_pll3(unsigned int hz);

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