| /external/u-boot/arch/arm/mach-socfpga/include/mach/ |
| clock_manager_arria10.h | 22 u32 cntr2clk; member in struct:socfpga_clock_manager_main_pll
48 u32 cntr2clk; member in struct:socfpga_clock_manager_per_pll
|
| clock_manager_s10.h | 81 u32 cntr2clk; member in struct:socfpga_clock_manager_main_pll
107 u32 cntr2clk; member in struct:socfpga_clock_manager_per_pll
|
| /external/u-boot/arch/arm/mach-socfpga/ |
| clock_manager_s10.c | 120 writel(0xff, &clock_manager_base->main_pll.cntr2clk);
128 writel(0xff, &clock_manager_base->per_pll.cntr2clk);
139 writel(cfg->main_pll_cntr2clk, &clock_manager_base->main_pll.cntr2clk);
147 writel(cfg->per_pll_cntr2clk, &clock_manager_base->per_pll.cntr2clk);
|
| clock_manager_arria10.c | 90 { "cntr2clk-cnt", offsetof(struct mainpll_cfg, cntr2clk_cnt) },
113 { "cntr2clk-cnt", offsetof(struct perpll_cfg, cntr2clk_cnt) },
114 { "cntr2clk-src", offsetof(struct perpll_cfg, cntr2clk_src) },
739 writel(main_cfg->cntr2clk_cnt, &clock_manager_base->main_pll.cntr2clk);
766 &clock_manager_base->per_pll.cntr2clk);
[all...] |
