/external/llvm/lib/Target/Hexagon/ |
HexagonRDF.h | 21 bool covers(RegisterRef RA, RegisterRef RR) const override; 22 bool covers(const RegisterSet &RRs, RegisterRef RR) const override;
|
HexagonRDF.cpp | 19 bool HexagonRegisterAliasInfo::covers(RegisterRef RA, RegisterRef RB) const { function in class:HexagonRegisterAliasInfo 34 return RegisterAliasInfo::covers(RA, RB); 37 bool HexagonRegisterAliasInfo::covers(const RegisterSet &RRs, RegisterRef RR) function in class:HexagonRegisterAliasInfo 59 return RegisterAliasInfo::covers(RRs, RR);
|
RDFLiveness.cpp | 112 if (RAI.covers(RR, RefRR)) { 200 if (!FullChain && RAI.covers(RRs, RefRR)) 215 if (FullChain || IsPhi || !RAI.covers(RRs, QR)) 287 if (RAI.covers(DefRRs, RefRR)) 295 if (RAI.alias(RefRR, UR) && !RAI.covers(DefRRs, UR)) 307 if (RAI.covers(DefRRs, DR) || !RAI.alias(RefRR, DR)) 489 if (!RAI.covers(MidDefs, T.first)) 852 bool Covering = RAI.covers(DDR, I.first); 857 Covering = RAI.covers(DA.Addr->getRegRef(), Q); 879 if (RAI.covers(RRs, DRR) [all...] |
/external/pdfium/third_party/agg23/ |
agg_renderer_scanline.h | 56 const typename Scanline::cover_type* covers = span->covers; local 64 covers += xmin - x; 76 solid ? 0 : covers, 77 *covers);
|
agg_scanline_u.h | 38 cover_type* covers; member in struct:agg::scanline_u::span 79 m_cur_span->covers = m_covers + x; 83 void add_cells(int x, unsigned len, const CoverT* covers) 86 memcpy(m_covers + x, covers, len * sizeof(CoverT)); 93 m_cur_span->covers = m_covers + x; 107 m_cur_span->covers = m_covers + x;
|
agg_renderer_base.h | 134 const cover_type* covers) 147 covers += xmin() - x; 156 m_ren->blend_solid_hspan(x, y, len, c, covers);
|
agg_pixfmt_gray.h | 155 const int8u* covers) 160 calc_type alpha = (calc_type(c.a) * (calc_type(*covers) + 1)) >> 8; 164 Blender::blend_pix(p, c.v, alpha, *covers); 167 ++covers;
|
/external/llvm/lib/CodeGen/GlobalISel/ |
RegisterBank.cpp | 31 if (!covers(RC)) 33 // Verify that the register bank covers all the sub classes of the 34 // classes it covers. 38 // both agree on the covers. 46 // all the register classes it covers. 49 assert(covers(SubRC) && "Not all subclasses are covered"); 55 bool RegisterBank::covers(const TargetRegisterClass &RC) const { function in class:RegisterBank 99 if (!covers(RC))
|
RegisterBankInfo.cpp | 78 else if (RB.covers(*TRI.getRegClass(RCId))) 79 // If RB already covers this register class, there is nothing 197 assert(RegBank.covers(*RC) && 424 // Check that the union of the partial mappings covers the whole value,
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
RegisterBank.cpp | 36 if (!covers(RC)) 38 // Verify that the register bank covers all the sub classes of the 39 // classes it covers. 43 // both agree on the covers. 51 // all the register classes it covers. 54 assert(covers(SubRC) && "Not all subclasses are covered"); 60 bool RegisterBank::covers(const TargetRegisterClass &RC) const { function in class:RegisterBank 106 if (!covers(RC))
|
RegisterBankInfo.cpp | 123 assert(RegBank.covers(*RC) && 137 // Otherwise, all we can do is ensure the bank covers the class, and set it. 138 if (RB && !RB->covers(RC)) 517 // Check that the union of the partial mappings covers the whole value,
|
/external/llvm/include/llvm/CodeGen/GlobalISel/ |
RegisterBank.h | 70 /// Check whether this register bank covers \p RC. 71 /// In other words, check if this register bank fully covers 74 bool covers(const TargetRegisterClass &RC) const; 90 /// this register bank covers.
|
/cts/tests/tests/media/src/android/media/cts/ |
MediaCodecListTest.java | 635 assertTrue(VideoCapabilities.PerformancePoint.HD_30.covers(hd25Format)); 636 assertTrue(VideoCapabilities.PerformancePoint.HD_25.covers(hd25Format)); 637 assertFalse(VideoCapabilities.PerformancePoint.HD_24.covers(hd25Format)); 638 assertTrue(VideoCapabilities.PerformancePoint.FHD_30.covers(hd25Format)); 639 assertTrue(VideoCapabilities.PerformancePoint.FHD_25.covers(hd25Format)); 640 assertFalse(VideoCapabilities.PerformancePoint.FHD_24.covers(hd25Format)); 642 assertTrue(VideoCapabilities.PerformancePoint.HD_240.covers(portraitHd240Format)); 643 assertFalse(VideoCapabilities.PerformancePoint.HD_200.covers(portraitHd240Format)); 644 assertTrue(VideoCapabilities.PerformancePoint.FHD_240.covers(portraitHd240Format)); 645 assertFalse(VideoCapabilities.PerformancePoint.FHD_200.covers(portraitHd240Format)) [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64RegisterBankInfo.cpp | 37 assert(RBGPR.covers(*TRI.getRegClass(AArch64::GPR32RegClassID)) && 48 assert(RBFPR.covers(*TRI.getRegClass(AArch64::QQRegClassID)) && 50 assert(RBFPR.covers(*TRI.getRegClass(AArch64::FPR64RegClassID)) && 60 assert(RBCCR.covers(*TRI.getRegClass(AArch64::CCRRegClassID)) &&
|
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/ |
RegisterBank.h | 68 /// Check whether this register bank covers \p RC. 69 /// In other words, check if this register bank fully covers 72 bool covers(const TargetRegisterClass &RC) const; 88 /// this register bank covers.
|
/external/antlr/runtime/Ruby/lib/antlr3/ |
util.rb | 151 def covers?( range ) 161 range.covers?( self )
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
ARMRegisterBankInfo.cpp | 150 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRRegClassID)) && 152 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRwithAPSRRegClassID)) && 154 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRnopcRegClassID)) && 156 assert(RBGPR.covers(*TRI.getRegClass(ARM::rGPRRegClassID)) && 158 assert(RBGPR.covers(*TRI.getRegClass(ARM::tGPRRegClassID)) && 160 assert(RBGPR.covers(*TRI.getRegClass(ARM::tcGPRRegClassID)) && 162 assert(RBGPR.covers(*TRI.getRegClass(ARM::tGPR_and_tcGPRRegClassID)) &&
|
/dalvik/dexgen/src/com/android/dexgen/rop/ |
ByteCatchList.java | 108 if (one.covers(pc) && typeNotFound(one, resultArr, resultSz)) { 311 * @return {@code true} iff this item covers {@code pc} 313 public boolean covers(int pc) { method in class:ByteCatchList.Item
|
/dalvik/dx/src/com/android/dx/cf/code/ |
ByteCatchList.java | 108 if (one.covers(pc) && typeNotFound(one, resultArr, resultSz)) { 311 * @return {@code true} iff this item covers {@code pc} 313 public boolean covers(int pc) { method in class:ByteCatchList.Item
|
/external/harfbuzz_ng/src/ |
hb-ot-layout-gdef-table.hh | 288 bool covers (unsigned int set_index, hb_codepoint_t glyph_id) const function in struct:OT::MarkGlyphSetsFormat1 308 bool covers (unsigned int set_index, hb_codepoint_t glyph_id) const function in struct:OT::MarkGlyphSets 311 case 1: return u.format1.covers (set_index, glyph_id); 385 { return version.to_int () >= 0x00010002u && (this+markGlyphSetsDef).covers (set_index, glyph_id); }
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
AArch64RegisterBankInfo.cpp | 68 assert(RBGPR.covers(*TRI.getRegClass(AArch64::GPR32RegClassID)) && 74 assert(RBFPR.covers(*TRI.getRegClass(AArch64::QQRegClassID)) && 76 assert(RBFPR.covers(*TRI.getRegClass(AArch64::FPR64RegClassID)) && 81 assert(RBCCR.covers(*TRI.getRegClass(AArch64::CCRRegClassID)) &&
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
X86RegisterBankInfo.cpp | 39 assert(RBGPR.covers(*TRI.getRegClass(X86::GR64RegClassID)) &&
|
/external/libffi/src/powerpc/ |
darwin.S | 186 ; FLAG_RETURNS_NOTHING also covers struct ret-by-ref.
|
/external/pdfium/core/fxge/agg/ |
fx_agg_driver.cpp | [all...] |
/external/python/cpython2/Modules/_ctypes/libffi/src/powerpc/ |
darwin.S | 186 ; FLAG_RETURNS_NOTHING also covers struct ret-by-ref.
|