| /external/llvm/test/MC/AArch64/ |
| arm64-basic-a64-instructions.s | 10 crc32cx w18, w16, xzr
18 // CHECK: crc32cx w18, w16, xzr // encoding: [0x12,0x5e,0xdf,0x9a]
|
| directive-cpu.s | 25 crc32cx w0, w1, x3
29 crc32cx w0, w1, x3
52 // CHECK: crc32cx w0, w1, x3
62 // CHECK: crc32cx w0, w1, x3
|
| cyclone-crc.s | 19 crc32cx w19, w23, x29
27 CHECK: crc32cx w19, w23, x29
|
| basic-a64-instructions.s | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| arm64-basic-a64-instructions.s | 10 crc32cx w18, w16, xzr
18 // CHECK: crc32cx w18, w16, xzr // encoding: [0x12,0x5e,0xdf,0x9a]
|
| crc.s | 36 crc32cx w19, w23, x29
41 // CRC: crc32cx w19, w23, x29
50 // NOCRC: crc32cx w19, w23, x29
|
| directive-cpu.s | 16 crc32cx w0, w1, x3 label
17 // CHECK: crc32cx w0, w1, x3
|
| directive-cpu-err.s | 24 crc32cx w0, w1, x3
26 // CHECK-NEXT: crc32cx w0, w1, x3
|
| /external/vixl/src/aarch64/ |
| assembler-aarch64.h | 941 void crc32cx(const Register& wd, const Register& wn, const Register& xm);
[all...] |
| macro-assembler-aarch64.h | [all...] |
| assembler-aarch64.cc | 868 void Assembler::crc32cx(const Register& wd, function in class:vixl::aarch64::Assembler
873 Emit(SF(xm) | Rm(xm) | CRC32CX | Rn(wn) | Rd(wd));
[all...] |
| /external/vixl/test/aarch64/ |
| test-disasm-aarch64.cc | 726 TEST(crc32cx) {
729 COMPARE(crc32cx(w7, w8, x9), "crc32cx w7, w8, x9");
730 COMPARE(crc32cx(w8, w19, x29), "crc32cx w8, w19, x29");
731 COMPARE(crc32cx(w18, w18, x4), "crc32cx w18, w18, x4");
[all...] |
| test-cpu-features-aarch64.cc | [all...] |
| /external/capstone/suite/MC/AArch64/ |
| basic-a64-instructions.s.cs | 577 0x12,0x5e,0xdf,0x9a = crc32cx w18, w16, xzr
[all...] |
