/external/u-boot/arch/arm/mach-at91/arm926ejs/ |
at91sam9261_devices.c | 58 void at91_spi0_hw_init(unsigned long cs_mask) 66 if (cs_mask & (1 << 0)) { 69 if (cs_mask & (1 << 1)) { 72 if (cs_mask & (1 << 2)) { 75 if (cs_mask & (1 << 3)) { 78 if (cs_mask & (1 << 4)) { 81 if (cs_mask & (1 << 5)) { 84 if (cs_mask & (1 << 6)) { 87 if (cs_mask & (1 << 7)) { 92 void at91_spi1_hw_init(unsigned long cs_mask) [all...] |
at91sam9263_devices.c | 62 void at91_spi0_hw_init(unsigned long cs_mask) 70 if (cs_mask & (1 << 0)) { 73 if (cs_mask & (1 << 1)) { 76 if (cs_mask & (1 << 2)) { 79 if (cs_mask & (1 << 3)) { 82 if (cs_mask & (1 << 4)) { 85 if (cs_mask & (1 << 5)) { 88 if (cs_mask & (1 << 6)) { 91 if (cs_mask & (1 << 7)) { 96 void at91_spi1_hw_init(unsigned long cs_mask) [all...] |
at91sam9m10g45_devices.c | 59 void at91_spi0_hw_init(unsigned long cs_mask) 67 if (cs_mask & (1 << 0)) { 70 if (cs_mask & (1 << 1)) { 73 if (cs_mask & (1 << 2)) { 76 if (cs_mask & (1 << 3)) { 79 if (cs_mask & (1 << 4)) { 82 if (cs_mask & (1 << 5)) { 85 if (cs_mask & (1 << 6)) { 88 if (cs_mask & (1 << 7)) { 93 void at91_spi1_hw_init(unsigned long cs_mask) [all...] |
at91sam9rl_devices.c | 58 void at91_spi0_hw_init(unsigned long cs_mask) 66 if (cs_mask & (1 << 0)) { 69 if (cs_mask & (1 << 1)) { 72 if (cs_mask & (1 << 2)) { 75 if (cs_mask & (1 << 3)) { 78 if (cs_mask & (1 << 4)) { 81 if (cs_mask & (1 << 5)) { 84 if (cs_mask & (1 << 6)) { 87 if (cs_mask & (1 << 7)) {
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at91sam9260_devices.c | 61 void at91_spi0_hw_init(unsigned long cs_mask) 69 if (cs_mask & (1 << 0)) { 72 if (cs_mask & (1 << 1)) { 75 if (cs_mask & (1 << 2)) { 78 if (cs_mask & (1 << 3)) { 81 if (cs_mask & (1 << 4)) { 84 if (cs_mask & (1 << 5)) { 87 if (cs_mask & (1 << 6)) { 90 if (cs_mask & (1 << 7)) { 95 void at91_spi1_hw_init(unsigned long cs_mask) [all...] |
at91sam9x5_devices.c | 110 void at91_spi0_hw_init(unsigned long cs_mask) 118 if (cs_mask & (1 << 0)) 120 if (cs_mask & (1 << 1)) 122 if (cs_mask & (1 << 2)) 124 if (cs_mask & (1 << 3)) 126 if (cs_mask & (1 << 4)) 128 if (cs_mask & (1 << 5)) 130 if (cs_mask & (1 << 6)) 132 if (cs_mask & (1 << 7)) 136 void at91_spi1_hw_init(unsigned long cs_mask) [all...] |
at91sam9n12_devices.c | 54 void at91_spi0_hw_init(unsigned long cs_mask) 62 if (cs_mask & (1 << 0)) 64 if (cs_mask & (1 << 1)) 66 if (cs_mask & (1 << 2)) 68 if (cs_mask & (1 << 3)) 72 void at91_spi1_hw_init(unsigned long cs_mask) 80 if (cs_mask & (1 << 0)) 82 if (cs_mask & (1 << 1)) 84 if (cs_mask & (1 << 2)) 86 if (cs_mask & (1 << 3) [all...] |
/external/u-boot/drivers/ddr/marvell/a38x/ |
ddr3_training_leveling.h | 13 u32 *cs_mask);
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ddr3_training_leveling.c | 342 u32 c_cs, if_id, cs_mask = 0; local 347 * In TRAINIUNG reg (0x15b0) write 0x80000008 | cs_mask: 349 * cs_mask = 0x1 <<20 Trn_CS0 - CS0 is included in the DDR3 training 350 * cs_mask = 0x1 <<21 Trn_CS1 - CS1 is included in the DDR3 training 351 * cs_mask = 0x1 <<22 Trn_CS2 - CS2 is included in the DDR3 training 352 * cs_mask = 0x1 <<23 Trn_CS3 - CS3 is included in the DDR3 training 356 cs_mask = cs_mask | 1 << (20 + c_cs); 362 TRAINING_REG, (0x80000008 | cs_mask), 383 u32 c_cs, if_id, cs_mask = 0 local 835 u32 cs_mask[MAX_INTERFACE_NUM]; local [all...] |
ddr3_training_ip_prv_if.h | 36 u8 dev_num, u32 cs_mask, struct hws_cs_config_info *cs_info);
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ddr3_training.c | 360 u32 cs_mask = 0; local 476 cs_mask = 0; 498 cs_mask |= 503 ("Init_controller IF %d cs_mask %d\n", 504 if_id, cs_mask)); 513 ((cs_mask & (1 << cs_cnt)) ? 1 1272 u32 cs_mask[MAX_INTERFACE_NUM]; local [all...] |
/external/u-boot/arch/arm/mach-at91/include/mach/ |
at91_common.h | 19 void at91_spi0_hw_init(unsigned long cs_mask); 20 void at91_spi1_hw_init(unsigned long cs_mask);
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/external/u-boot/arch/arm/mach-at91/armv7/ |
sama5d3_devices.c | 89 void at91_spi0_hw_init(unsigned long cs_mask) 95 if (cs_mask & (1 << 0)) 97 if (cs_mask & (1 << 1)) 99 if (cs_mask & (1 << 2)) 101 if (cs_mask & (1 << 3))
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