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    Searched refs:dc_base (Results 1 - 4 of 4) sorted by null

  /external/u-boot/arch/arm/mach-uniphier/dram/
umc-pro4.c 72 static int umc_dramcont_init(void __iomem *dc_base, void __iomem *ca_base,
102 writel(0x66bb0f17, dc_base + UMC_CMDCTLA);
103 writel(0x18c6aa44, dc_base + UMC_CMDCTLB);
104 writel(umc_spcctla[size_e], dc_base + UMC_SPCCTLA);
105 writel(0x00ff0008, dc_base + UMC_SPCCTLB);
106 writel(0x000c00ae, dc_base + UMC_RDATACTL_D0);
107 writel(0x000c00ae, dc_base + UMC_RDATACTL_D1);
108 writel(0x04060802, dc_base + UMC_WDATACTL_D0);
109 writel(0x04060802, dc_base + UMC_WDATACTL_D1);
110 writel(0x04a02000, dc_base + UMC_DATASET)
166 void __iomem *dc_base = umc_base + 0x00400000; local
    [all...]
umc-ld4.c 80 static int umc_dramcont_init(void __iomem *dc_base, void __iomem *ca_base,
117 writel(umc_cmdctla_plus[freq_e], dc_base + UMC_CMDCTLA);
118 writel(umc_cmdctlb_plus[freq_e], dc_base + UMC_CMDCTLB);
119 writel(umc_spcctla[freq_e][size_e], dc_base + UMC_SPCCTLA);
120 writel(umc_spcctlb[freq_e], dc_base + UMC_SPCCTLB);
121 writel(umc_rdatactl[freq_e], dc_base + UMC_RDATACTL_D0);
122 writel(0x04060806, dc_base + UMC_WDATACTL_D0);
123 writel(0x04a02000, dc_base + UMC_DATASET);
125 writel(0x00400020, dc_base + UMC_DCCGCTL);
126 writel(0x00000003, dc_base + 0x7000)
172 void __iomem *dc_base = umc_base + 0x00400000; local
    [all...]
umc-sld8.c 83 static int umc_dramcont_init(void __iomem *dc_base, void __iomem *ca_base,
119 dc_base + UMC_CMDCTLA);
121 dc_base + UMC_CMDCTLB);
122 writel(umc_spcctla[freq_e][size_e], dc_base + UMC_SPCCTLA);
123 writel(umc_spcctlb[freq_e], dc_base + UMC_SPCCTLB);
124 writel(umc_rdatactl[freq_e], dc_base + UMC_RDATACTL_D0);
125 writel(0x04060806, dc_base + UMC_WDATACTL_D0);
126 writel(0x04a02000, dc_base + UMC_DATASET);
128 writel(0x00400020, dc_base + UMC_DCCGCTL);
129 writel(0x00000003, dc_base + 0x7000)
175 void __iomem *dc_base = umc_base + 0x00400000; local
    [all...]
umc-pxs2.c 410 static void umc_set_system_latency(void __iomem *dc_base, int phy_latency)
415 val = readl(dc_base + UMC_RDATACTL_D0);
433 writel(val, dc_base + UMC_RDATACTL_D0);
434 writel(val, dc_base + UMC_RDATACTL_D1);
436 readl(dc_base + UMC_RDATACTL_D1); /* relax */
440 static void umc_refresh_ctrl(void __iomem *dc_base, int enable)
444 tmp = readl(dc_base + UMC_SPCSETB);
452 writel(tmp, dc_base + UMC_SPCSETB);
464 static int umc_dc_init(void __iomem *dc_base, enum dram_freq freq,
486 writel(umc_cmdctla[freq], dc_base + UMC_CMDCTLA)
546 void __iomem *dc_base = umc_ch_base + 0x00011000; local
    [all...]

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