/external/u-boot/drivers/ddr/marvell/a38x/ |
ddr3_training_leveling.c | 93 CHECK_STATUS(ddr3_tip_if_write 111 CHECK_STATUS(ddr3_tip_if_write 131 CHECK_STATUS(ddr3_tip_if_write 136 CHECK_STATUS(ddr3_tip_if_write 150 CHECK_STATUS(ddr3_tip_if_write 156 CHECK_STATUS(ddr3_tip_if_write 171 CHECK_STATUS(ddr3_tip_if_write 175 CHECK_STATUS(ddr3_tip_if_write 180 CHECK_STATUS(ddr3_tip_if_write 184 CHECK_STATUS(ddr3_tip_if_write [all...] |
ddr3_training.c | 267 CHECK_STATUS(ddr3_tip_if_write 274 CHECK_STATUS(ddr3_tip_if_write 281 CHECK_STATUS(ddr3_tip_if_write 287 CHECK_STATUS(ddr3_tip_if_write 296 CHECK_STATUS(ddr3_tip_if_write 302 CHECK_STATUS(ddr3_tip_if_write 395 CHECK_STATUS(ddr3_tip_if_write 415 CHECK_STATUS(ddr3_tip_if_write 421 CHECK_STATUS(ddr3_tip_if_write 427 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id 1052 int ddr3_tip_if_write(u32 dev_num, enum hws_access_type interface_access, function [all...] |
ddr3_training_bist.c | 33 ddr3_tip_if_write(0, access_type, 0, ODPG_DATA_CTRL_REG, 38 ddr3_tip_if_write(0, access_type, 0, ODPG_DATA_CTRL_REG, 45 ddr3_tip_if_write(0, access_type, 0, ODPG_DATA_BUFFER_SIZE_REG, pattern_addr_length, MASK_ALL_BITS); 55 ddr3_tip_if_write(0, access_type, 0, ODPG_DATA_BUFFER_OFFS_REG, offset, MASK_ALL_BITS); 65 ddr3_tip_if_write(0, access_type, 0, ODPG_DATA_CTRL_REG, 0, MASK_ALL_BITS); 433 ddr3_tip_if_write(0, access_type, 0, ODPG_DATA_CTRL_REG, 0, MASK_ALL_BITS); 451 ddr3_tip_if_write(0, access_type, 0, ODPG_DATA_CTRL_REG, 456 ddr3_tip_if_write(0, access_type, 0, ODPG_DATA_CTRL_REG, 466 ddr3_tip_if_write(0, access_type, 0, ODPG_DATA_BUFFER_SIZE_REG, pattern_addr_len, MASK_ALL_BITS); 506 ddr3_tip_if_write(0, ACCESS_TYPE_UNICAST, 0, ODPG_DATA_CTRL_REG, 0, MASK_ALL_BITS) [all...] |
ddr3_training_ip_engine.c | 376 CHECK_STATUS(ddr3_tip_if_write 380 CHECK_STATUS(ddr3_tip_if_write 385 CHECK_STATUS(ddr3_tip_if_write 389 CHECK_STATUS(ddr3_tip_if_write 411 CHECK_STATUS(ddr3_tip_if_write 434 CHECK_STATUS(ddr3_tip_if_write 441 CHECK_STATUS(ddr3_tip_if_write 450 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, interface_num, 487 CHECK_STATUS(ddr3_tip_if_write 498 CHECK_STATUS(ddr3_tip_if_write [all...] |
ddr3_training_hw_algo.c | 53 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id, 99 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id, 103 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id,
|
ddr3_training_centralization.c | 86 CHECK_STATUS(ddr3_tip_if_write 481 CHECK_STATUS(ddr3_tip_if_write(dev_num, ACCESS_TYPE_UNICAST, 524 CHECK_STATUS(ddr3_tip_if_write(dev_num, ACCESS_TYPE_UNICAST,
|
ddr3_training_ip_flow.h | 132 int ddr3_tip_if_write(u32 dev_num, enum hws_access_type interface_access,
|
ddr3_training_pbs.c | 64 CHECK_STATUS(ddr3_tip_if_write 866 CHECK_STATUS(ddr3_tip_if_write 873 CHECK_STATUS(ddr3_tip_if_write
|
ddr3_debug.c | [all...] |
mv_ddr_plat.c | 927 CHECK_STATUS(ddr3_tip_if_write [all...] |