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  /external/u-boot/arch/arm/mach-exynos/
clock_init.h 69 unsigned dpll_pdiv; member in struct:mem_timings
clock_init_exynos5.c 169 .dpll_pdiv = 0x4,
798 writel(mem->dpll_pdiv * PLL_LOCK_FACTOR, &clk->dpll_lock);
855 val = set_pll(mem->dpll_mdiv, mem->dpll_pdiv, mem->dpll_sdiv);

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