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    Searched refs:end_pwrlvl (Results 1 - 5 of 5) sorted by null

  /device/linaro/bootloader/arm-trusted-firmware/lib/psci/
psci_suspend.c 26 unsigned int end_pwrlvl)
30 psci_acquire_pwr_domain_locks(end_pwrlvl,
35 * 'end_pwrlvl'. The exit retention state could be deeper than the entry
38 psci_get_target_local_pwr_states(end_pwrlvl, &state_info);
50 psci_set_pwr_domains_to_run(end_pwrlvl);
52 psci_release_pwr_domain_locks(end_pwrlvl,
60 static void psci_suspend_to_pwrdown_start(unsigned int end_pwrlvl,
67 psci_set_suspend_pwrlvl(end_pwrlvl);
143 unsigned int end_pwrlvl,
162 psci_acquire_pwr_domain_locks(end_pwrlvl,
    [all...]
psci_off.c 41 int psci_do_cpu_off(unsigned int end_pwrlvl)
60 psci_acquire_pwr_domain_locks(end_pwrlvl,
79 psci_do_state_coordination(end_pwrlvl, &state_info);
82 /* Update the last cpu for each level till end_pwrlvl */
83 psci_stats_update_pwr_down(end_pwrlvl, &state_info);
123 psci_release_pwr_domain_locks(end_pwrlvl,
psci_common.c 280 * from the current cpu power domain to its ancestor at the 'end_pwrlvl'. This
284 void psci_get_target_local_pwr_states(unsigned int end_pwrlvl,
294 for (lvl = PSCI_CPU_PWR_LVL + 1; lvl <= end_pwrlvl; lvl++) {
306 * from the current cpu power domain to its ancestor at the 'end_pwrlvl' will
310 static void psci_set_target_local_pwr_states(unsigned int end_pwrlvl,
327 for (lvl = 1; lvl <= end_pwrlvl; lvl++) {
355 void psci_set_pwr_domains_to_run(unsigned int end_pwrlvl)
361 for (lvl = PSCI_CPU_PWR_LVL + 1; lvl <= end_pwrlvl; lvl++) {
380 * the target power level (end_pwrlvl). It updates the array of requested power
383 * Then, for each level (apart from the CPU level) until the 'end_pwrlvl', i
744 unsigned int end_pwrlvl, cpu_idx = plat_my_core_pos(); local
    [all...]
psci_stat.c 64 * the target power level (end_pwrlvl).
66 * Then, for each level (apart from the CPU level) until the 'end_pwrlvl', it
72 void psci_stats_update_pwr_down(unsigned int end_pwrlvl,
77 assert(end_pwrlvl <= PLAT_MAX_PWR_LVL);
82 for (lvl = PSCI_CPU_PWR_LVL + 1; lvl <= end_pwrlvl; lvl++) {
104 void psci_stats_update_pwr_up(unsigned int end_pwrlvl,
112 assert(end_pwrlvl <= PLAT_MAX_PWR_LVL);
132 for (lvl = PSCI_CPU_PWR_LVL + 1; lvl <= end_pwrlvl; lvl++) {
psci_private.h 207 void psci_get_target_local_pwr_states(unsigned int end_pwrlvl,
214 void psci_do_state_coordination(unsigned int end_pwrlvl,
216 void psci_acquire_pwr_domain_locks(unsigned int end_pwrlvl,
218 void psci_release_pwr_domain_locks(unsigned int end_pwrlvl,
224 void psci_set_pwr_domains_to_run(unsigned int end_pwrlvl);
245 int psci_do_cpu_off(unsigned int end_pwrlvl);
249 unsigned int end_pwrlvl,
266 void psci_stats_update_pwr_down(unsigned int end_pwrlvl,
268 void psci_stats_update_pwr_up(unsigned int end_pwrlvl,

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