| /external/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
| radv_amdgpu_cs.h | 55 struct radeon_winsys_bo *fence_bo; member in struct:radv_amdgpu_ctx
|
| radv_amdgpu_cs.c | 717 ret.handle = radv_amdgpu_winsys_bo(ctx->fence_bo)->bo;
[all...] |
| /external/mesa3d/src/gallium/drivers/nouveau/nv50/ |
| nv98_video.c | 267 0, 0x1000, NULL, &dec->fence_bo);
271 nouveau_bo_map(dec->fence_bo, NOUVEAU_BO_RDWR, screen->client);
272 dec->fence_map = dec->fence_bo->map;
278 PUSH_REFN (push[0], dec->fence_bo, NOUVEAU_BO_GART|NOUVEAU_BO_RDWR);
280 PUSH_DATAh(push[0], dec->fence_bo->offset);
281 PUSH_DATA (push[0], dec->fence_bo->offset);
289 PUSH_REFN (push[1], dec->fence_bo, NOUVEAU_BO_GART|NOUVEAU_BO_RDWR);
291 PUSH_DATAh(push[1], (dec->fence_bo->offset + 0x10));
292 PUSH_DATA (push[1], (dec->fence_bo->offset + 0x10));
300 PUSH_REFN (push[2], dec->fence_bo, NOUVEAU_BO_GART|NOUVEAU_BO_RDWR)
[all...] |
| nv98_video_ppp.c | 40 { dec->fence_bo, NOUVEAU_BO_WR | NOUVEAU_BO_GART },
116 PUSH_DATAh(push, (dec->fence_bo->offset + 0x20));
117 PUSH_DATA (push, (dec->fence_bo->offset + 0x20));
|
| nv98_video_bsp.c | 54 { dec->fence_bo, NOUVEAU_BO_WR | NOUVEAU_BO_GART },
118 comm_addr = (dec->fence_bo->offset + COMM_OFFSET) >> 8;
163 PUSH_DATAh(push, dec->fence_bo->offset);
164 PUSH_DATA (push, dec->fence_bo->offset);
|
| nv98_video_vp.c | 85 { dec->fence_bo, NOUVEAU_BO_WR | NOUVEAU_BO_GART },
120 comm_addr = (dec->fence_bo->offset + COMM_OFFSET)>>8;
173 PUSH_DATAh(push, (dec->fence_bo->offset + 0x10));
174 PUSH_DATA (push, (dec->fence_bo->offset + 0x10));
|
| /external/mesa3d/src/gallium/drivers/nouveau/nvc0/ |
| nvc0_video.c | 291 0, 0x1000, NULL, &dec->fence_bo);
295 nouveau_bo_map(dec->fence_bo, NOUVEAU_BO_RDWR, screen->client);
296 dec->fence_map = dec->fence_bo->map;
302 PUSH_REFN (push[0], dec->fence_bo, NOUVEAU_BO_GART|NOUVEAU_BO_RDWR);
304 PUSH_DATAh(push[0], dec->fence_bo->offset);
305 PUSH_DATA (push[0], dec->fence_bo->offset);
313 PUSH_REFN (push[1], dec->fence_bo, NOUVEAU_BO_GART|NOUVEAU_BO_RDWR);
315 PUSH_DATAh(push[1], (dec->fence_bo->offset + 0x10));
316 PUSH_DATA (push[1], (dec->fence_bo->offset + 0x10));
324 PUSH_REFN (push[2], dec->fence_bo, NOUVEAU_BO_GART|NOUVEAU_BO_RDWR)
[all...] |
| nvc0_video_ppp.c | 40 { dec->fence_bo, NOUVEAU_BO_WR | NOUVEAU_BO_GART },
116 PUSH_DATAh(push, (dec->fence_bo->offset + 0x20));
117 PUSH_DATA (push, (dec->fence_bo->offset + 0x20));
|
| nvc0_video_bsp.c | 150 { dec->fence_bo, NOUVEAU_BO_WR | NOUVEAU_BO_GART },
171 comm_addr = (dec->fence_bo->offset + COMM_OFFSET) >> 8;
212 PUSH_DATAh(push, dec->fence_bo->offset);
213 PUSH_DATA (push, dec->fence_bo->offset);
|
| nvc0_video_vp.c | 85 { dec->fence_bo, NOUVEAU_BO_WR | NOUVEAU_BO_GART },
120 comm_addr = (dec->fence_bo->offset + COMM_OFFSET)>>8;
173 PUSH_DATAh(push, (dec->fence_bo->offset + 0x10));
174 PUSH_DATA (push, (dec->fence_bo->offset + 0x10));
|
| /external/mesa3d/src/gallium/drivers/nouveau/ |
| nouveau_video.h | 27 struct nouveau_bo *cmd_bo, *data_bo, *fence_bo; member in struct:nouveau_decoder
|
| nouveau_video.c | 481 if (dec->fence_bo)
482 nouveau_bo_ref(NULL, &dec->fence_bo);
582 0, 4096, NULL, &dec->fence_bo);
585 nouveau_bo_map(dec->fence_bo, NOUVEAU_BO_RDWR, NULL);
586 dec->fence_map = dec->fence_bo->map;
622 PUSH_DATA (push, dec->fence_bo->offset);
|
| nouveau_vp3_video.h | 75 struct nouveau_bo *fence_bo; member in struct:nouveau_vp3_decoder
|
| nouveau_vp3_video.c | 204 nouveau_bo_ref(NULL, &dec->fence_bo);
|
