| /external/u-boot/drivers/mmc/ |
| socfpga_dw_mmc.c | 65 int fifo_depth; local
72 fifo_depth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
74 if (fifo_depth < 0) {
93 RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2);
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| rockchip_dw_mmc.c | 31 int fifo_depth; member in struct:rockchip_dwmmc_priv
69 priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0);
71 if (priv->fifo_depth < 0)
113 priv->fifo_depth = dtplat->fifo_depth;
127 RX_WMARK(priv->fifo_depth / 2 - 1) |
128 TX_WMARK(priv->fifo_depth / 2);
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| ftsdc010_mci.c | 42 fdt32_t fifo_depth; member in struct:ftsdc010
58 int fifo_depth; member in struct:ftsdc_priv
400 priv->fifo_depth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
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| dw_mmc.c | 102 u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >> local
140 len = fifo_depth - ((len >>
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| /external/u-boot/drivers/net/phy/ |
| ti.c | 96 int fifo_depth; member in struct:dp83867_private
192 dp83867->fifo_depth = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
204 dp83867->fifo_depth = DEFAULT_FIFO_DEPTH;
238 (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT));
261 (dp83867->fifo_depth << DP83867_PHYCTRL_RXFIFO_SHIFT) |
262 (dp83867->fifo_depth << DP83867_PHYCTRL_TXFIFO_SHIFT));
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| /external/u-boot/drivers/spi/ |
| cadence_qspi.h | 21 u32 fifo_depth; member in struct:cadence_spi_platdata
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| zynq_spi.c | 68 u8 fifo_depth; member in struct:zynq_spi_priv
131 priv->fifo_depth = ZYNQ_SPI_FIFO_DEPTH;
234 /* Write the data into TX FIFO - tx threshold is fifo_depth */
236 while ((tx_tvl < priv->fifo_depth) && tx_len) {
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| pic32_spi.c | 61 u32 fifo_depth; /* FIFO depth in bytes */ member in struct:pic32_spi_priv
192 priv->fifo_n_word = DIV_ROUND_UP(priv->fifo_depth, wordlen / 8);
355 priv->fifo_depth = 16;
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| zynq_qspi.c | 88 u8 fifo_depth; member in struct:zynq_qspi_priv
164 priv->fifo_depth = ZYNQ_QSPI_FIFO_DEPTH;
438 zynq_qspi_fill_tx_fifo(priv, priv->fifo_depth);
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| cadence_qspi.c | 290 plat->fifo_depth = fdtdec_get_uint(blob, node, "cdns,fifo-depth", 128);
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| cadence_qspi_apb.c | 396 writel(plat->fifo_depth / 2, plat->regbase + CQSPI_REG_SRAMPARTITION);
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