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Searched
refs:getConstrainedRegClassForOperand
(Results
1 - 5
of
5
) sorted by null
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/
Utils.cpp
67
RegClass = TRI.
getConstrainedRegClassForOperand
(RegMO, MRI);
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
SIRegisterInfo.h
228
getConstrainedRegClassForOperand
(const MachineOperand &MO,
AMDGPUInstructionSelector.cpp
74
TRI.
getConstrainedRegClassForOperand
(MO, MRI);
175
TRI.
getConstrainedRegClassForOperand
(MO, MRI);
383
TRI.
getConstrainedRegClassForOperand
(RS->getOperand(0), MRI);
SIRegisterInfo.cpp
[
all
...]
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
TargetRegisterInfo.h
[
all
...]
Completed in 106 milliseconds