| /external/llvm/include/llvm/CodeGen/ |
| RegisterClassInfo.h | 134 unsigned getRegPressureSetLimit(unsigned Idx) const {
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| RegisterClassInfo.h | 138 unsigned getRegPressureSetLimit(unsigned Idx) const {
|
| TargetRegisterInfo.h | 776 virtual unsigned getRegPressureSetLimit(const MachineFunction &MF,
[all...] |
| /external/llvm/lib/CodeGen/ |
| RegisterClassInfo.cpp | 179 return TRI->getRegPressureSetLimit(*MF, Idx) -
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| RegisterPressure.cpp | 930 unsigned Limit = RCI->getRegPressureSetLimit(i);
[all...] |
| MachineLICM.cpp | 290 RegLimit[i] = TRI->getRegPressureSetLimit(MF, i);
[all...] |
| MachineScheduler.cpp | [all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIRegisterInfo.h | 51 unsigned getRegPressureSetLimit(const MachineFunction &MF,
|
| SIRegisterInfo.cpp | 212 unsigned SIRegisterInfo::getRegPressureSetLimit(const MachineFunction &MF,
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| RegisterClassInfo.cpp | 190 return TRI->getRegPressureSetLimit(*MF, Idx) -
|
| RegisterPressure.cpp | 951 unsigned Limit = RCI->getRegPressureSetLimit(i);
[all...] |
| MachineLICM.cpp | 334 RegLimit[i] = TRI->getRegPressureSetLimit(MF, i);
[all...] |
| MachineScheduler.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| SIRegisterInfo.h | 220 unsigned getRegPressureSetLimit(const MachineFunction &MF,
|
| GCNSchedStrategy.cpp | 52 SGPRCriticalLimit = SRI->getRegPressureSetLimit(DAG->MF,
54 VGPRCriticalLimit = SRI->getRegPressureSetLimit(DAG->MF,
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| SIRegisterInfo.cpp | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | 733 virtual unsigned getRegPressureSetLimit(const MachineFunction &MF,
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| HexagonMachineScheduler.cpp | 279 unsigned Limit = DAG->getRegClassInfo()->getRegPressureSetLimit(i);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| ARMGenRegisterInfo.inc | [all...] |
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| MipsGenRegisterInfo.inc | [all...] |
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
| X86GenRegisterInfo.inc | [all...] |
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| AArch64GenRegisterInfo.inc | [all...] |
