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  /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/
InstructionSelector.cpp 63 MachineInstr *RootI = MRI.getVRegDef(Root.getReg());
68 MachineInstr *RHSI = MRI.getVRegDef(RHS.getReg());
Utils.cpp 187 MachineInstr *MI = MRI.getVRegDef(VReg);
203 MachineInstr *MI = MRI.getVRegDef(VReg);
211 auto *DefMI = MRI.getVRegDef(Reg);
220 DefMI = MRI.getVRegDef(SrcReg);
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
PPCMIPeephole.cpp 136 return MRI->getVRegDef(Reg);
306 MachineInstr *DefMI = MRI->getVRegDef(TrueReg1);
319 MachineInstr *LoadMI = MRI->getVRegDef(DefReg);
406 MachineInstr *DefMI = MRI->getVRegDef(TrueReg);
416 MachineInstr *Splt = MRI->getVRegDef(ConvReg);
469 MachineInstr *DefMI = MRI->getVRegDef(TrueReg);
481 MachineInstr *P1 = MRI->getVRegDef(DefsReg1);
482 MachineInstr *P2 = MRI->getVRegDef(DefsReg2);
530 MachineInstr *SrcMI = MRI->getVRegDef(NarrowReg);
574 MachineInstr *SrcMI = MRI->getVRegDef(NarrowReg)
    [all...]
PPCBranchCoalescing.cpp 365 MachineInstr *Op1Def = MRI->getVRegDef(Op1.getReg());
366 MachineInstr *Op2Def = MRI->getVRegDef(Op2.getReg());
465 MachineInstr *DefInst = MRI->getVRegDef(Use.getReg());
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/
BPFMIPeephole.cpp 80 MachineInstr *DefInsn = MRI->getVRegDef(MovMI->getOperand(1).getReg());
95 MachineInstr *PhiDef = MRI->getVRegDef(opnd.getReg());
140 MachineInstr *SllMI = MRI->getVRegDef(ShfReg);
154 MachineInstr *MovMI = MRI->getVRegDef(SllMI->getOperand(1).getReg());
  /external/llvm/lib/Target/ARM/
MLxExpansionPass.cpp 95 MachineInstr *DefMI = MRI->getVRegDef(Reg);
102 DefMI = MRI->getVRegDef(Reg);
108 DefMI = MRI->getVRegDef(Reg);
149 MachineInstr *DefMI = MRI->getVRegDef(Reg);
160 DefMI = MRI->getVRegDef(SrcReg);
168 DefMI = MRI->getVRegDef(Reg);
174 DefMI = MRI->getVRegDef(Reg);
A15SDOptimizer.cpp 160 MachineInstr *MI = MRI->getVRegDef(SReg);
259 MachineInstr *DPRMI = MRI->getVRegDef(MI->getOperand(1).getReg());
260 MachineInstr *SPRMI = MRI->getVRegDef(MI->getOperand(2).getReg());
311 MachineInstr *Def = MRI->getVRegDef(OpReg);
354 MachineInstr *Def = MRI->getVRegDef(MI->getOperand(1).getReg());
383 MachineInstr *NewMI = MRI->getVRegDef(Reg);
391 MachineInstr *NewMI = MRI->getVRegDef(MI->getOperand(1).getReg());
620 MachineInstr *Def = MRI->getVRegDef(*I);
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
MLxExpansionPass.cpp 95 MachineInstr *DefMI = MRI->getVRegDef(Reg);
102 DefMI = MRI->getVRegDef(Reg);
108 DefMI = MRI->getVRegDef(Reg);
149 MachineInstr *DefMI = MRI->getVRegDef(Reg);
160 DefMI = MRI->getVRegDef(SrcReg);
168 DefMI = MRI->getVRegDef(Reg);
174 DefMI = MRI->getVRegDef(Reg);
A15SDOptimizer.cpp 158 MachineInstr *MI = MRI->getVRegDef(SReg);
253 MachineInstr *DPRMI = MRI->getVRegDef(MI->getOperand(1).getReg());
254 MachineInstr *SPRMI = MRI->getVRegDef(MI->getOperand(2).getReg());
305 MachineInstr *Def = MRI->getVRegDef(OpReg);
348 MachineInstr *Def = MRI->getVRegDef(MI->getOperand(1).getReg());
377 MachineInstr *NewMI = MRI->getVRegDef(Reg);
385 MachineInstr *NewMI = MRI->getVRegDef(MI->getOperand(1).getReg());
608 MachineInstr *Def = MRI->getVRegDef(*I);
  /external/llvm/lib/Target/Hexagon/
HexagonHardwareLoops.cpp 419 MachineInstr *DI = MRI->getVRegDef(PhiOpReg);
429 if (MRI->getVRegDef(IndReg) == Phi && checkForImmediate(Opnd2, V)) {
447 MachineInstr *PredI = MRI->getVRegDef(PredR);
483 IVOp = MRI->getVRegDef(F->first);
572 MachineInstr *IV_Phi = MRI->getVRegDef(IVReg);
618 MachineInstr *CondI = MRI->getVRegDef(PredReg);
666 MachineBasicBlock *DefBB = MRI->getVRegDef(R)->getParent();
669 OldInsts.push_back(MRI->getVRegDef(R));
673 MachineBasicBlock *DefBB = MRI->getVRegDef(R)->getParent();
676 OldInsts.push_back(MRI->getVRegDef(R))
    [all...]
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
HexagonHardwareLoops.cpp 440 MachineInstr *DI = MRI->getVRegDef(PhiOpReg);
448 if (MRI->getVRegDef(IndReg) == Phi && checkForImmediate(Opnd2, V)) {
466 MachineInstr *PredI = MRI->getVRegDef(PredR);
502 IVOp = MRI->getVRegDef(F->first);
605 MachineInstr *IV_Phi = MRI->getVRegDef(IVReg);
651 MachineInstr *CondI = MRI->getVRegDef(PredReg);
699 MachineBasicBlock *DefBB = MRI->getVRegDef(R)->getParent();
705 OldInsts.push_back(MRI->getVRegDef(R));
709 MachineBasicBlock *DefBB = MRI->getVRegDef(R)->getParent();
715 OldInsts.push_back(MRI->getVRegDef(R))
    [all...]
HexagonVExtract.cpp 78 MachineInstr *DI = MRI.getVRegDef(ExtIdxR);
128 MachineInstr *DefI = MRI.getVRegDef(VecR);
  /external/llvm/lib/CodeGen/
OptimizePHIs.cpp 107 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg);
114 SrcMI = MRI->getVRegDef(SrcMI->getOperand(1).getReg());
LiveVariables.cpp 133 assert(MRI->getVRegDef(reg) && "Register use before def!");
168 if (MBB == MRI->getVRegDef(reg)->getParent()) return;
179 MarkVirtRegAliveInBlock(VRInfo, MRI->getVRegDef(reg)->getParent(), *PI);
596 MarkVirtRegAliveInBlock(getVarInfo(*I),MRI->getVRegDef(*I)->getParent(),
660 if (VirtRegInfo[Reg].Kills[j] == MRI->getVRegDef(Reg))
732 const MachineInstr *Def = MRI.getVRegDef(Reg);
  /external/llvm/lib/Target/PowerPC/
PPCMIPeephole.cpp 126 MachineInstr *DefMI = MRI->getVRegDef(TrueReg1);
203 MachineInstr *MI = MRI->getVRegDef(SrcReg);
  /external/swiftshader/third_party/LLVM/lib/CodeGen/
OptimizePHIs.cpp 103 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg);
110 SrcMI = MRI->getVRegDef(SrcMI->getOperand(1).getReg());
LiveVariables.cpp 128 assert(MRI->getVRegDef(reg) && "Register use before def!");
164 if (MBB == MRI->getVRegDef(reg)->getParent()) return;
175 MarkVirtRegAliveInBlock(VRInfo, MRI->getVRegDef(reg)->getParent(), *PI);
583 MarkVirtRegAliveInBlock(getVarInfo(*I),MRI->getVRegDef(*I)->getParent(),
625 if (VirtRegInfo[Reg].Kills[j] == MRI->getVRegDef(Reg))
695 const MachineInstr *Def = MRI.getVRegDef(Reg);
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
OptimizePHIs.cpp 116 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg);
123 SrcMI = MRI->getVRegDef(SrcMI->getOperand(1).getReg());
  /external/swiftshader/third_party/LLVM/lib/Target/ARM/
MLxExpansionPass.cpp 92 MachineInstr *DefMI = MRI->getVRegDef(Reg);
99 DefMI = MRI->getVRegDef(Reg);
105 DefMI = MRI->getVRegDef(Reg);
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
AMDGPUInstructionSelector.cpp 245 int64_t Tgt = getConstant(MRI.getVRegDef(I.getOperand(1).getReg()));
246 int64_t Enabled = getConstant(MRI.getVRegDef(I.getOperand(2).getReg()));
247 int64_t Done = getConstant(MRI.getVRegDef(I.getOperand(7).getReg()));
248 int64_t VM = getConstant(MRI.getVRegDef(I.getOperand(8).getReg()));
261 int64_t Tgt = getConstant(MRI.getVRegDef(I.getOperand(1).getReg()));
262 int64_t Enabled = getConstant(MRI.getVRegDef(I.getOperand(2).getReg()));
266 int64_t Done = getConstant(MRI.getVRegDef(I.getOperand(5).getReg()));
267 int64_t VM = getConstant(MRI.getVRegDef(I.getOperand(6).getReg()));
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/
RISCVMergeBaseOffset.cpp 147 MachineInstr &OffsetTail = *MRI->getVRegDef(Reg);
156 *MRI->getVRegDef(OffsetTail.getOperand(1).getReg());
  /external/llvm/lib/Target/NVPTX/
NVPTXReplaceImageHandles.cpp 140 MachineInstr &TexHandleDef = *MRI.getVRegDef(Op.getReg());
  /external/llvm/lib/Target/WebAssembly/
WebAssemblyLowerBrUnless.cpp 75 MachineInstr *Def = MRI.getVRegDef(Cond);
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/
NVPTXReplaceImageHandles.cpp 140 MachineInstr &TexHandleDef = *MRI.getVRegDef(Op.getReg());
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
WebAssemblyLowerBrUnless.cpp 78 MachineInstr *Def = MRI.getVRegDef(Cond);

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