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Searched
refs:hasSuperClassEq
(Results
1 - 17
of
17
) sorted by null
/external/llvm/lib/Target/ARM/
A15SDOptimizer.cpp
142
return MRI->getRegClass(Reg)->
hasSuperClassEq
(TRC);
280
if (TRC->
hasSuperClassEq
(MRI->getRegClass(FullReg))) {
531
if (MRI->getRegClass(Reg)->
hasSuperClassEq
(&ARM::QPRRegClass) ||
532
MRI->getRegClass(Reg)->
hasSuperClassEq
(&ARM::DPairRegClass)) {
548
} else if (MRI->getRegClass(Reg)->
hasSuperClassEq
(&ARM::DPRRegClass)) {
554
assert(MRI->getRegClass(Reg)->
hasSuperClassEq
(&ARM::SPRRegClass) &&
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
A15SDOptimizer.cpp
140
return MRI->getRegClass(Reg)->
hasSuperClassEq
(TRC);
274
if (TRC->
hasSuperClassEq
(MRI->getRegClass(FullReg))) {
519
if (MRI->getRegClass(Reg)->
hasSuperClassEq
(&ARM::QPRRegClass) ||
520
MRI->getRegClass(Reg)->
hasSuperClassEq
(&ARM::DPairRegClass)) {
536
} else if (MRI->getRegClass(Reg)->
hasSuperClassEq
(&ARM::DPRRegClass)) {
542
assert(MRI->getRegClass(Reg)->
hasSuperClassEq
(&ARM::SPRRegClass) &&
Thumb1InstrInfo.cpp
112
assert((RC->
hasSuperClassEq
(&ARM::tGPRRegClass) ||
116
if (RC->
hasSuperClassEq
(&ARM::tGPRRegClass) ||
/external/llvm/lib/Target/AArch64/
AArch64AdvSIMDScalarPass.cpp
117
return MRI->getRegClass(Reg)->
hasSuperClassEq
(&AArch64::GPR64RegClass);
124
return (MRI->getRegClass(Reg)->
hasSuperClassEq
(&AArch64::FPR64RegClass) &&
126
(MRI->getRegClass(Reg)->
hasSuperClassEq
(&AArch64::FPR128RegClass) &&
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
AArch64AdvSIMDScalarPass.cpp
110
return MRI->getRegClass(Reg)->
hasSuperClassEq
(&AArch64::GPR64RegClass);
117
return (MRI->getRegClass(Reg)->
hasSuperClassEq
(&AArch64::FPR64RegClass) &&
119
(MRI->getRegClass(Reg)->
hasSuperClassEq
(&AArch64::FPR128RegClass) &&
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
X86SpeculativeLoadHardening.cpp
[
all
...]
/external/swiftshader/third_party/LLVM/include/llvm/Target/
TargetRegisterInfo.h
159
///
hasSuperClassEq
- Returns true if RC is a super-class of or equal to this
161
bool
hasSuperClassEq
(const TargetRegisterClass *RC) const {
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
SystemZRegisterInfo.cpp
257
if (!(NewRC->
hasSuperClassEq
(&SystemZ::GR128BitRegClass) &&
/external/llvm/include/llvm/Target/
TargetRegisterInfo.h
161
bool
hasSuperClassEq
(const TargetRegisterClass *RC) const {
[
all
...]
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
TargetRegisterInfo.h
127
bool
hasSuperClassEq
(const TargetRegisterClass *RC) const {
[
all
...]
/external/llvm/lib/Target/PowerPC/
PPCFastISel.cpp
483
bool Is32BitInt = UseRC->
hasSuperClassEq
(&PPC::GPRCRegClass);
505
assert(UseRC->
hasSuperClassEq
(&PPC::G8RCRegClass) &&
626
bool Is32BitInt = RC->
hasSuperClassEq
(&PPC::GPRCRegClass);
[
all
...]
PPCInstrInfo.cpp
158
IsRegCR = MRI->getRegClass(Reg)->
hasSuperClassEq
(&PPC::CRRCRegClass) ||
159
MRI->getRegClass(Reg)->
hasSuperClassEq
(&PPC::CRBITRCRegClass);
[
all
...]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
PPCFastISel.cpp
487
bool Is32BitInt = UseRC->
hasSuperClassEq
(&PPC::GPRCRegClass);
507
assert(UseRC->
hasSuperClassEq
(&PPC::G8RCRegClass) &&
641
bool Is32BitInt = RC->
hasSuperClassEq
(&PPC::GPRCRegClass);
[
all
...]
PPCInstrInfo.cpp
194
IsRegCR = MRI->getRegClass(Reg)->
hasSuperClassEq
(&PPC::CRRCRegClass) ||
195
MRI->getRegClass(Reg)->
hasSuperClassEq
(&PPC::CRBITRCRegClass);
[
all
...]
/external/swiftshader/third_party/LLVM/lib/CodeGen/
MachineVerifier.cpp
782
if (!RC->
hasSuperClassEq
(DRC)) {
[
all
...]
/external/llvm/lib/CodeGen/
MachineVerifier.cpp
[
all
...]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
MachineVerifier.cpp
[
all
...]
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