| /external/u-boot/drivers/mtd/nand/ |
| am335x_spl_bch.c | 34 void (*hwctrl)(struct mtd_info *mtd, int cmd,
47 hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
50 hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
69 hwctrl(mtd, offs & 0xff,
71 hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
74 hwctrl(mtd, (page_addr & 0xff),
76 hwctrl(mtd, ((page_addr >> 8) & 0xff),
80 hwctrl(mtd, (page_addr >> 16) & 0x0f,
85 hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
104 hwctrl(mtd, NAND_CMD_RNDOUTSTART, NAND_CTRL_CLE
[all...] |
| nand_spl_simple.c | 67 void (*hwctrl)(struct mtd_info *mtd, int cmd,
84 hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
87 hwctrl(mtd, offs & 0xff,
89 hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
91 hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
92 hwctrl(mtd, ((page_addr >> 8) & 0xff),
96 hwctrl(mtd, (page_addr >> 16) & 0x0f,
100 hwctrl(mtd, NAND_CMD_READSTART,
102 hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
|
| atmel_nand.c | [all...] |
| /external/u-boot/arch/arm/mach-socfpga/include/mach/ |
| freeze_controller.h | 14 u32 hwctrl; member in struct:socfpga_freeze_controller
|
