/external/u-boot/drivers/ddr/marvell/a38x/ |
ddr3_training_ip_prv_if.h | 25 u8 dev_num, enum hws_access_type interface_access, u32 if_id, 28 u8 dev_num, enum hws_access_type interface_access, u32 if_id, 41 u32 dev_num, enum hws_access_type access_type, u32 dunit_id, 44 u32 dev_num, enum hws_access_type access_type, u32 dunit_id, 47 u32 dev_num, enum hws_access_type dunit_access_type, u32 if_id, 48 enum hws_access_type phy_access_type, u32 phy_id, 51 u32 dev_num, u32 if_id, enum hws_access_type phy_access_type, 56 u32 dev_num, enum hws_access_type access_type, u32 if_id, 74 u32 dev_num, enum hws_pattern pattern, enum hws_access_type access_type, 100 int (*mv_ddr_phy_read)(enum hws_access_type phy_access [all...] |
ddr3_training_ip_engine.h | 42 enum hws_access_type pup_access_type, 51 int ddr3_tip_ip_training(u32 dev_num, enum hws_access_type access_type, 53 enum hws_access_type pup_access_type, 62 int ddr3_tip_ip_training_wrapper(u32 dev_num, enum hws_access_type access_type, 64 enum hws_access_type pup_access_type, 82 int mv_ddr_load_dm_pattern_to_odpg(enum hws_access_type access_type, enum hws_pattern pattern,
|
ddr3_training_ip_flow.h | 132 int ddr3_tip_if_write(u32 dev_num, enum hws_access_type interface_access, 134 int ddr3_tip_if_polling(u32 dev_num, enum hws_access_type access_type, 137 int ddr3_tip_if_read(u32 dev_num, enum hws_access_type interface_access, 140 enum hws_access_type access_type, 144 int ddr3_tip_bus_read(u32 dev_num, u32 if_id, enum hws_access_type phy_access, 147 int ddr3_tip_bus_write(u32 dev_num, enum hws_access_type e_interface_access, 148 u32 if_id, enum hws_access_type e_phy_access, u32 phy_id, 151 int ddr3_tip_freq_set(u32 dev_num, enum hws_access_type e_access, u32 if_id, 168 int ddr3_tip_load_pattern_to_odpg(u32 dev_num, enum hws_access_type access_type, 172 int ddr3_tip_configure_odpg(u32 dev_num, enum hws_access_type access_type [all...] |
ddr3_training_ip_bist.h | 38 enum hws_access_type access_type,
|
ddr3_training_bist.c | 12 enum hws_access_type access_type, 20 enum hws_access_type access_type, u32 if_num, 167 enum hws_access_type access_type, 422 static int mv_ddr_bist_tx(enum hws_access_type access_type) 440 static int mv_ddr_odpg_bist_prepare(enum hws_pattern pattern, enum hws_access_type access_type,
|
ddr3_training_ip.h | 89 enum hws_access_type { enum
|
ddr3_training.c | 91 static int ddr3_tip_write_odt(u32 dev_num, enum hws_access_type access_type, 99 int adll_calibration(u32 dev_num, enum hws_access_type access_type, 101 static int ddr3_tip_set_timing(u32 dev_num, enum hws_access_type access_type, 363 enum hws_access_type access_type = ACCESS_TYPE_UNICAST; 1052 int ddr3_tip_if_write(u32 dev_num, enum hws_access_type interface_access, 1063 int ddr3_tip_if_read(u32 dev_num, enum hws_access_type interface_access, [all...] |
ddr3_training_ip_engine.c | 334 int ddr3_tip_ip_training(u32 dev_num, enum hws_access_type access_type, 336 enum hws_access_type pup_access_type, 569 int ddr3_tip_load_pattern_to_odpg(u32 dev_num, enum hws_access_type access_type, 623 int ddr3_tip_configure_odpg(u32 dev_num, enum hws_access_type access_type, 691 enum hws_access_type pup_access_type, [all...] |
ddr3_training_hw_algo.c | 50 enum hws_access_type access_type = ACCESS_TYPE_UNICAST;
|
mv_ddr_plat.c | 589 static int prfa_write(enum hws_access_type phy_access, u32 phy, 612 static int prfa_read(enum hws_access_type phy_access, u32 phy, [all...] |
ddr3_debug.c | [all...] |