| /external/tensorflow/tensorflow/python/data/experimental/kernel_tests/ |
| restructured_dataset_test.py | 40 i32 = dtypes.int32
42 test_cases = [((i32, i32, i32), None),
43 (((i32, i32), i32), None),
44 ((i32, i32, i32), (None, None, None))
[all...] |
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| ARMGenDAGISel.inc | 66 /* 21*/ OPC_CheckChild1Type, MVT::i32,
69 /* 26*/ OPC_CheckChild1Type, MVT::i32,
77 /* 41*/ OPC_CheckChild1Type, MVT::i32,
80 /* 45*/ OPC_CheckType, MVT::i32,
83 /* 51*/ OPC_EmitInteger, MVT::i32, 14,
84 /* 54*/ OPC_EmitRegister, MVT::i32, 0 /*zero_reg*/,
86 MVT::i32, 3/*#Ops*/, 0, 1, 2,
87 // Src: (or:{ *:[i32] } (sra:{ *:[i32] } (shl:{ *:[i32] } GPR:{ *:[i32] }:$Rm, 24:{ *:[i32] }), 16:{ *:[i32] }), (and:{ *:[i32] } (srl:{ *:[i32] } GPR:{ (…)
[all...] |
| /external/llvm/test/MC/ARM/ |
| vorr-vbic-illegal-cases.s | 4 vorr.i32 d2, #0xffffffff
5 vorr.i32 q2, #0xffffffff
6 vorr.i32 d2, #0xabababab
7 vorr.i32 q2, #0xabababab
12 @ CHECK: vorr.i32 d2, #0xffffffff
14 @ CHECK: vorr.i32 q2, #0xffffffff
16 @ CHECK: vorr.i32 d2, #0xabababab
18 @ CHECK: vorr.i32 q2, #0xabababab
24 vbic.i32 d2, #0xffffffff
25 vbic.i32 q2, #0xfffffff
[all...] |
| vmov-vmvn-illegal-cases.s | 5 @ CHECK: vmov.i32 d2, #0xffffffab
7 @ CHECK: vmov.i32 q2, #0xffffffab
14 @ CHECK: vmvn.i32 d2, #0xffffffab
16 @ CHECK: vmvn.i32 q2, #0xffffffab
22 vmov.i32 d2, #0xffffffab
23 vmov.i32 q2, #0xffffffab
27 vmvn.i32 d2, #0xffffffab
28 vmvn.i32 q2, #0xffffffab
|
| neont2-mov-encoding.s | 8 vmov.i32 d16, #0x20
9 vmov.i32 d16, #0x2000
10 vmov.i32 d16, #0x200000
11 vmov.i32 d16, #0x20000000
12 vmov.i32 d16, #0x20FF
13 vmov.i32 d16, #0x20FFFF
19 @ CHECK: vmov.i32 d16, #0x20 @ encoding: [0xc2,0xef,0x10,0x00]
20 @ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0xc2,0xef,0x10,0x02]
21 @ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0xc2,0xef,0x10,0x04]
22 @ CHECK: vmov.i32 d16, #0x20000000 @ encoding: [0xc2,0xef,0x10,0x06
[all...] |
| vmov-vmvn-byte-replicate.s | 19 vmov.i32 d2, #0xffffffff
20 vmov.i32 q2, #0xffffffff
21 vmov.i32 d2, #0xabababab
22 vmov.i32 q2, #0xabababab
26 vmvn.i32 d2, #0xffffffff
27 vmvn.i32 q2, #0xffffffff
28 vmvn.i32 d2, #0xabababab
29 vmvn.i32 q2, #0xabababab
|
| neon-mov-encoding.s | 6 vmov.i32 d16, #0x20
7 vmov.i32 d16, #0x2000
8 vmov.i32 d16, #0x200000
9 vmov.i32 d16, #0x20000000
10 vmov.i32 d16, #0x20FF
11 vmov.i32 d16, #0x20FFFF
17 @ CHECK: vmov.i32 d16, #0x20 @ encoding: [0x10,0x00,0xc2,0xf2]
18 @ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0x10,0x02,0xc2,0xf2]
19 @ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0x10,0x04,0xc2,0xf2]
20 @ CHECK: vmov.i32 d16, #0x20000000 @ encoding: [0x10,0x06,0xc2,0xf2
[all...] |
| /frameworks/av/media/libstagefright/foundation/tests/ |
| Flagged_test.cpp | 208 using i32 = int32_t;
213 static_assert(Flagged<i32, u32, 0u, 0u, 0>::sFlagMask == 0u, "");
214 static_assert(Flagged<i32, u32, 0u, 0u, 0>::sFlagShift == 0, "");
215 static_assert(Flagged<i32, u32, 0u, 0u, 0>::sEffectiveMask == 0u, "");
217 static_assert(Flagged<i32, u32, 0u, 0u, 10>::sFlagMask == 0u, "");
218 static_assert(Flagged<i32, u32, 0u, 0u, 10>::sFlagShift == 10, "");
219 static_assert(Flagged<i32, u32, 0u, 0u, 10>::sEffectiveMask == 0u, "");
221 static_assert(Flagged<i32, u32, 0u, 0u, -1>::sFlagMask == 0u, "");
222 static_assert(Flagged<i32, u32, 0u, 0u, -1>::sFlagShift == 0, "");
223 static_assert(Flagged<i32, u32, 0u, 0u, -1>::sEffectiveMask == 0u, "")
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/WebAssembly/ |
| basic-assembly.s | 7 .param i32, i64
13 i32.const $0=, -1
20 i32.const $push2=, 1
22 i32.ge_s $push0=, $pop2, $pop7
28 i32.call $push8=, something2@FUNCTION, $pop10
29 i32.const $push11=, 0
31 i32.const $push5=, 1
32 i32.add $push4=, $pop8, $pop5
35 i32.lt_s $push1=, $pop3, $pop9
45 # CHECK-NEXT: .param i32, i6
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| vorr-vbic-illegal-cases.s | 4 vorr.i32 d2, #0xffffffff
5 vorr.i32 q2, #0xffffffff
6 vorr.i32 d2, #0xabababab
7 vorr.i32 q2, #0xabababab
14 @ CHECK: vorr.i32 d2, #0xffffffff
18 @ CHECK: vorr.i32 q2, #0xffffffff
22 @ CHECK: vorr.i32 d2, #0xabababab
26 @ CHECK: vorr.i32 q2, #0xabababab
36 vbic.i32 d2, #0xffffffff
37 vbic.i32 q2, #0xfffffff
[all...] |
| neont2-mov-encoding.s | 8 vmov.i32 d16, #0x20
9 vmov.i32 d16, #0x2000
10 vmov.i32 d16, #0x200000
11 vmov.i32 d16, #0x20000000
12 vmov.i32 d16, #0x20FF
13 vmov.i32 d16, #0x20FFFF
19 @ CHECK: vmov.i32 d16, #0x20 @ encoding: [0xc2,0xef,0x10,0x00]
20 @ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0xc2,0xef,0x10,0x02]
21 @ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0xc2,0xef,0x10,0x04]
22 @ CHECK: vmov.i32 d16, #0x20000000 @ encoding: [0xc2,0xef,0x10,0x06
[all...] |
| neon-mov-encoding.s | 6 vmov.i32 d16, #0x20
7 vmov.i32 d16, #0x2000
8 vmov.i32 d16, #0x200000
9 vmov.i32 d16, #0x20000000
10 vmov.i32 d16, #0x20FF
11 vmov.i32 d16, #0x20FFFF
17 @ CHECK: vmov.i32 d16, #0x20 @ encoding: [0x10,0x00,0xc2,0xf2]
18 @ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0x10,0x02,0xc2,0xf2]
19 @ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0x10,0x04,0xc2,0xf2]
20 @ CHECK: vmov.i32 d16, #0x20000000 @ encoding: [0x10,0x06,0xc2,0xf2
[all...] |
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| MipsGenDAGISel.inc | 75 // Dst: (SDC1_D64_MMR6 f64:{ *:[f64] }:$v, addrRegImm:{ *:[i32] }:$a)
99 // Dst: (SDC1_MM f64:{ *:[f64] }:$v, addrRegImm:{ *:[i32] }:$a)
146 // Dst: (SWC1_MM f32:{ *:[f32] }:$v, addrRegImm:{ *:[i32] }:$a)
175 /* 208*/ OPC_CheckChild1Type, MVT::i32,
182 /* 221*/ OPC_EmitRegister, MVT::i32, Mips::ZERO,
185 // Src: (st 0:{ *:[i32] }, addr:{ *:[iPTR] }:$dst)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 18
186 // Dst: (SW ZERO:{ *:[i32] }, addr:{ *:[iPTR] }:$dst)
190 /* 238*/ OPC_CheckChild1Type, MVT::i32,
202 // Src: (st GPR32Opnd:{ *:[i32] }:$rt, addr:{ *:[iPTR] }:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei8>> - Complexity = 13
203 // Dst: (SB GPR32Opnd:{ *:[i32] }:$rt, addr:{ *:[iPTR] }:$addr
[all...] |
| /external/capstone/suite/MC/ARM/ |
| neont2-mov-encoding.s.cs | 5 0xc2,0xef,0x10,0x00 = vmov.i32 d16, #0x20
6 0xc2,0xef,0x10,0x02 = vmov.i32 d16, #0x2000
7 0xc2,0xef,0x10,0x04 = vmov.i32 d16, #0x200000
8 0xc2,0xef,0x10,0x06 = vmov.i32 d16, #0x20000000
9 0xc2,0xef,0x10,0x0c = vmov.i32 d16, #0x20ff
10 0xc2,0xef,0x10,0x0d = vmov.i32 d16, #0x20ffff
15 0xc2,0xef,0x50,0x00 = vmov.i32 q8, #0x20
16 0xc2,0xef,0x50,0x02 = vmov.i32 q8, #0x2000
17 0xc2,0xef,0x50,0x04 = vmov.i32 q8, #0x200000
18 0xc2,0xef,0x50,0x06 = vmov.i32 q8, #0x2000000
[all...] |
| neon-mov-encoding.s.cs | 5 0x10,0x00,0xc2,0xf2 = vmov.i32 d16, #0x20
6 0x10,0x02,0xc2,0xf2 = vmov.i32 d16, #0x2000
7 0x10,0x04,0xc2,0xf2 = vmov.i32 d16, #0x200000
8 0x10,0x06,0xc2,0xf2 = vmov.i32 d16, #0x20000000
9 0x10,0x0c,0xc2,0xf2 = vmov.i32 d16, #0x20ff
10 0x10,0x0d,0xc2,0xf2 = vmov.i32 d16, #0x20ffff
15 0x50,0x00,0xc2,0xf2 = vmov.i32 q8, #0x20
16 0x50,0x02,0xc2,0xf2 = vmov.i32 q8, #0x2000
17 0x50,0x04,0xc2,0xf2 = vmov.i32 q8, #0x200000
18 0x50,0x06,0xc2,0xf2 = vmov.i32 q8, #0x2000000
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| neon-mov-encoding.s | 7 vmov.i32 d16, #0x20
8 vmov.i32 d16, #0x2000
9 vmov.i32 d16, #0x200000
10 vmov.i32 d16, #0x20000000
11 vmov.i32 d16, #0x20FF
12 vmov.i32 d16, #0x20FFFF
18 @ CHECK: vmov.i32 d16, #0x20 @ encoding: [0x10,0x00,0xc2,0xf2]
19 @ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0x10,0x02,0xc2,0xf2]
20 @ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0x10,0x04,0xc2,0xf2]
21 @ CHECK: vmov.i32 d16, #0x20000000 @ encoding: [0x10,0x06,0xc2,0xf2
[all...] |
| neont2-mov-encoding.s | 12 @ CHECK: vmov.i32 d16, #0x20 @ encoding: [0x10,0x00,0xc2,0xef]
13 vmov.i32 d16, #0x20
14 @ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0x10,0x02,0xc2,0xef]
15 vmov.i32 d16, #0x2000
16 @ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0x10,0x04,0xc2,0xef]
17 vmov.i32 d16, #0x200000
18 @ CHECK: vmov.i32 d16, #0x20000000 @ encoding: [0x10,0x06,0xc2,0xef]
19 vmov.i32 d16, #0x20000000
20 @ CHECK: vmov.i32 d16, #0x20FF @ encoding: [0x10,0x0c,0xc2,0xef]
21 vmov.i32 d16, #0x20F
[all...] |
| neon-bitwise-encoding.s | 21 vorr.i32 d16, #0x1000000
22 vorr.i32 q8, #0x1000000
23 vorr.i32 q8, #0x0
25 @ FIXME: vorr.i32 d16, #0x1000000 @ encoding: [0x11,0x07,0xc0,0xf2]
26 @ FIXME: vorr.i32 q8, #0x1000000 @ encoding: [0x51,0x07,0xc0,0xf2]
27 @ FIXME: vorr.i32 q8, #0x0 @ encoding: [0x50,0x01,0xc0,0xf2]
31 vbic.i32 d16, #0xFF000000
32 vbic.i32 q8, #0xFF000000
36 @ FIXME: vbic.i32 d16, #0xFF000000 @ encoding: [0x3f,0x07,0xc7,0xf3]
37 @ FIXME: vbic.i32 q8, #0xFF000000 @ encoding: [0x7f,0x07,0xc7,0xf3
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| XCoreISelDAGToDAG.cpp | 53 /// i32.
55 return CurDAG->getTargetConstant(Imm, MVT::i32);
94 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
95 Offset = CurDAG->getTargetConstant(0, MVT::i32);
104 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
105 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), MVT::i32);
116 Offset = CurDAG->getTargetConstant(0, MVT::i32);
126 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), MVT::i32);
137 Offset = CurDAG->getTargetConstant(0, MVT::i32);
147 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), MVT::i32);
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelDAGToDAG.cpp | 48 /// i32.
50 return CurDAG->getTargetConstant(Imm, dl, MVT::i32);
91 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
92 Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i32);
101 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
103 MVT::i32);
120 Reg = CurDAG->getRegister(XCore::CP, MVT::i32);
123 Reg = CurDAG->getRegister(XCore::DP, MVT::i32);
143 MVT::i32, MskSize));
150 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32,
[all...] |
| XCoreISelLowering.cpp | 77 addRegisterClass(MVT::i32, &XCore::GRRegsRegClass);
86 // Use i32 for setcc operations results (slt, sgt, ...).
91 setOperationAction(ISD::BR_CC, MVT::i32, Expand);
92 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand);
93 setOperationAction(ISD::ADDC, MVT::i32, Expand);
94 setOperationAction(ISD::ADDE, MVT::i32, Expand);
95 setOperationAction(ISD::SUBC, MVT::i32, Expand);
96 setOperationAction(ISD::SUBE, MVT::i32, Expand);
101 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Custom);
102 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Custom)
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/ |
| XCoreISelDAGToDAG.cpp | 48 /// i32.
50 return CurDAG->getTargetConstant(Imm, dl, MVT::i32);
91 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
92 Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i32);
101 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
103 MVT::i32);
120 Reg = CurDAG->getRegister(XCore::CP, MVT::i32);
123 Reg = CurDAG->getRegister(XCore::DP, MVT::i32);
143 MVT::i32, MskSize));
150 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32,
[all...] |
| /external/clang/test/SemaCXX/ |
| ms_integer_suffix.cpp | 16 static_assert(sizeof(0i32) == __SIZEOF_INT32__, "");
|
| /external/libvpx/config/arm-neon/vpx_dsp/arm/ |
| idct_neon.asm.S | 26 vmovn.i32 \dst0, q0
27 vmovn.i32 \dst1, q1
28 vmovn.i32 \dst2, q2
29 vmovn.i32 \dst3, q3
40 vmovn.i32 \dst0, q0
41 vmovn.i32 \dst1, q2
42 vmovn.i32 \dst2, q1
43 vmovn.i32 \dst3, q3
|
| /external/libtextclassifier/utils/tflite/ |
| encoder_common.cc | 57 std::fill(out->data.i32 + output_offset,
58 out->data.i32 + output_offset + from_this_element,
59 in.data.i32[value_index]);
77 (output_offset > 0) ? out->data.i32[output_offset - 1] : 0;
78 std::fill(out->data.i32 + output_offset, out->data.i32 + output_size,
108 int32_t* output_buffer = output_tensor->data.i32;
|
