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    Searched refs:l2csr0 (Results 1 - 2 of 2) sorted by null

  /external/u-boot/arch/powerpc/cpu/mpc85xx/
cpu_init.c 565 out_be32(&l2cache->l2csr0, L2CSR0_L2FI|L2CSR0_L2LFC);
566 while ((in_be32(&l2cache->l2csr0)
569 out_be32(&l2cache->l2csr0, L2CSR0_L2E|L2CSR0_L2PE|L2CSR0_L2REP_MODE);
704 if (l2cache->l2csr0 & L2CSR0_L2E)
  /external/u-boot/arch/powerpc/include/asm/
immap_85xx.h 3055 u32 l2csr0; \/* 0x000 L2 cache control and status register 0 *\/ member in struct:ccsr_cluster_l2
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