| /external/swiftshader/third_party/subzero/src/ |
| IceTargetLoweringMIPS32.cpp | [all...] |
| IceTargetLoweringX86BaseImpl.h | [all...] |
| IceTargetLoweringX8664.h | 78 Variable *TDB = makeReg(IceType_i32);
|
| IceTargetLoweringARM32.cpp | [all...] |
| IceTargetLoweringX8664.cpp | 376 T = makeReg(IceType_i32);
459 Variable *T64 = makeReg(IceType_i64, RegNum);
474 Variable *NewT = makeReg(IceType_i32, RegNum32);
487 T = makeReg(IceType_i64, RegNum);
596 Variable *T = makeReg(IceType_i64);
601 Variable *T = makeReg(IceType_i32);
602 Variable *T64 = makeReg(IceType_i64);
664 Variable *T = makeReg(IceType_i32);
665 Variable *T64 = makeReg(IceType_i64);
691 Variable *T = makeReg(IceType_i64)
[all...] |
| IceTargetLoweringMIPS32.h | 672 Variable *makeReg(Type Ty, RegNumT RegNum = RegNumT());
675 auto *Zero = makeReg(IceType_i32, RegMIPS32::Reg_ZERO);
681 return makeReg(IceType_i32, RegNum);
685 return makeReg(IceType_f32, RegNum);
689 return makeReg(IceType_f64, RegNum);
[all...] |
| IceTargetLoweringX8632.cpp | 394 Variable *T_ecx = makeReg(IceType_i32, Traits::RegisterSet::Reg_ecx);
|
| IceTargetLoweringX86Base.h | 426 Variable *makeReg(Type Ty, RegNumT RegNum = RegNumT());
712 Dest = makeReg(Src0->getType(), RegNum);
[all...] |
| IceTargetLoweringARM32.h | 305 Variable *makeReg(Type Ty, RegNumT RegNum = RegNumT());
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/AsmParser/ |
| AVRAsmParser.cpp | 208 void makeReg(unsigned RegNo) {
688 Op.makeReg(RegNum);
704 Op.makeReg(correspondingDREG);
|
