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    Searched refs:mbar2_writeLong (Results 1 - 6 of 6) sorted by null

  /external/u-boot/arch/m68k/cpu/mcf52x2/
speed.c 47 mbar2_writeLong(MCFSIM_PLLCR, cpll); /* Set the PLL to bypass mode (PSTCLK = crystal) */
48 mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* set the clock speed */
50 mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* Start locking (pll bypass = 1) */
cpu_init.c 205 mbar2_writeLong(MCFSIM_GPIO_INT_EN, 0x00000080);
209 /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); */ /* Enable a 1 cycle pre-drive cycle on CS1 */
676 mbar2_writeLong(MCFSIM_GPIO_FUNC, CONFIG_SYS_GPIO_FUNC);
677 mbar2_writeLong(MCFSIM_GPIO1_FUNC, CONFIG_SYS_GPIO1_FUNC);
678 mbar2_writeLong(MCFSIM_GPIO_EN, CONFIG_SYS_GPIO_EN);
679 mbar2_writeLong(MCFSIM_GPIO1_EN, CONFIG_SYS_GPIO1_EN);
680 mbar2_writeLong(MCFSIM_GPIO_OUT, CONFIG_SYS_GPIO_OUT);
681 mbar2_writeLong(MCFSIM_GPIO1_OUT, CONFIG_SYS_GPIO1_OUT);
707 mbar2_writeLong(MCFSIM_GPIO_INT_EN, 0x00000080);
710 mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); /* Enable a 1 cycle pre-drive cycle on CS1 *
    [all...]
  /external/u-boot/board/freescale/m5249evb/
m5249evb.c 27 mbar2_writeLong(MCFSIM_GPIO1_OUT, val); /* Set LED on */
  /external/u-boot/board/freescale/m5253demo/
m5253demo.c 114 mbar2_writeLong(CIM_MISCCR, CIM_MISCCR_CPUEND);
  /external/u-boot/board/freescale/m5253evbe/
m5253evbe.c 107 mbar2_writeLong(CIM_MISCCR, CIM_MISCCR_CPUEND);
  /external/u-boot/arch/m68k/include/asm/
m5249.h 22 #define mbar2_writeLong(x,y) *((volatile unsigned long *) (CONFIG_SYS_MBAR2 + x)) = y

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