| /external/u-boot/arch/x86/cpu/intel_common/ |
| Makefile | 14 obj-y += microcode.o
|
| cpu.c | 16 #include <asm/microcode.h>
45 debug("%s: Microcode update failure (err=%d)\n", __func__, ret);
|
| microcode.c | 6 * Microcode update for Intel PIII and later CPUs
14 #include <asm/microcode.h>
22 * struct microcode_update - standard microcode header from Intel
66 /* Quark does not have microcode MSRs */
99 /* CPUID sets MSR 0x8B iff a microcode update has been loaded. */
116 debug("microcode: sig=%#x pf=%#x revision=%#x\n",
121 /* Get a microcode update from the device tree and apply it */
148 * The microcode has been removed from the device tree
152 debug("%s: Microcode data not available\n", __func__);
172 debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n"
[all...] |
| car.S | 14 #include <asm/microcode.h>
50 /* TODO: Load microcode later - the 'no eviction' mode breaks this */
240 ucode_base: /* Declared in microcode.h */
241 .long 0 /* microcode base */
243 ucode_size: /* Declared in microcode.h */
244 .long 0 /* microcode size */
|
| /bionic/libc/kernel/uapi/asm-x86/asm/ |
| mce.h | 47 __u32 microcode; member in struct:mce
|
| /external/kernel-headers/original/uapi/asm-x86/asm/ |
| mce.h | 37 __u32 microcode; /* Microcode revision */ member in struct:mce
|
| /device/linaro/bootloader/edk2/IntelFspPkg/FspSecCore/Ia32/ |
| FspApiEntry.asm | 112 ; Beginning of microcode update region starts on paragraph boundary
153 ; esi -> microcode update to check
157 ; Check for valid microcode header
209 ; Advance just after end of this microcode
224 ; Is valid Microcode start point ?
233 ; Address >= microcode region address + microcode region size?
236 jae done ;Jif address is outside of microcode region
241 ; Get the revision of the current microcode update loaded
250 rdmsr ; Get current microcode signature
[all...] |
| FspApiEntry.s | 264 # Beginning of microcode update region starts on paragraph boundary
308 # esi -> microcode update to check
314 # Check for valid microcode header
384 # Advance just after end of this microcode
403 # Is valid Microcode start point ?
414 # Address >= microcode region address + microcode region size?
419 jae Done #Jif address is outside of microcode region
425 # Get the revision of the current microcode update loaded
435 rdmsr # Get current microcode signature
[all...] |
| /external/u-boot/drivers/qe/ |
| qe.c | 180 * Upload microcode to IRAM for those SOCs which do not have ROM in QE.
184 /* enable the microcode in IRAM */
338 * Upload a QE microcode
341 * the actual uploading of the microcode.
350 printf("QE: uploading microcode '%s' version %u.%u.%u\n",
354 printf("QE: uploading microcode '%s'\n", (char *)ucode->id);
365 * Upload a microcode to the I-RAM at a specific address.
367 * See docs/README.qe_firmware for information on QE microcode uploading.
376 * all of the microcode structures, minus the CRC.
406 printf("QE microcode not found\n")
[all...] |
| /external/u-boot/arch/x86/cpu/ |
| cpu.c | 33 #include <asm/microcode.h>
|
| mp_init.c | 18 #include <asm/microcode.h>
130 * By the time APs call ap_init() caching has been setup, and microcode has
253 debug("Microcode at %x\n", params->microcode_ptr);
|
| /external/u-boot/arch/x86/cpu/ivybridge/ |
| cpu.c | 24 #include <asm/microcode.h>
|
| /external/u-boot/drivers/net/fm/ |
| fm.c | 69 * fm_upload_ucode - Fman microcode upload worker function
71 * This function does the actual uploading of an Fman microcode
82 /* write microcode to IRAM */
91 printf("Fman%u: microcode upload timeout\n", fm_idx + 1);
93 /* enable microcode from IRAM */
101 * a microcode to the Fman instead of the QE.
103 * Because the process for uploading a microcode to the Fman is similar for
104 * that of the QE, the QE firmware binary format is used for Fman microcode.
152 * For situations where the second RISC uses the same microcode
157 be32_to_cpu(firmware->microcode[i].count)
[all...] |
| /external/u-boot/include/ |
| fsl_qe.h | 240 u8 count; /* Number of microcode[] structures */
256 u32 code_offset;/* Offset of the actual microcode */
257 u8 major; /* The microcode version major */
258 u8 minor; /* The microcode version minor */
259 u8 revision; /* The microcode version revision */
262 } __attribute__ ((packed)) microcode[1]; member in struct:qe_firmware
263 /* All microcode binaries should be located here */
264 /* CRC32 should be located here, after the microcode binaries */
|
| /external/u-boot/doc/ |
| README.x86 | 168 cpu_microcode_blob.bin 0x711540 microcode 70720
219 * ./Microcode/C0_22211.BIN
531 CPU Microcode
533 Modern CPUs usually require a special bit stream called microcode [8] to be
956 microcode tool: label
[all...] |
| /device/linaro/bootloader/edk2/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/ |
| SecEntry.asm | 223 cmp eax, 8000000Eh ;Check if EFI_NOT_FOUND returned. Error code for Microcode Update not found.
224 je CallSecFspInit ;If microcode not found, don't hang, but continue.
|
