| /art/compiler/utils/mips/ |
| assembler_mips32r5_test.cc | 29 bool operator()(const mips::Register& a, const mips::Register& b) const {
34 class AssemblerMIPS32r5Test : public AssemblerTest<mips::MipsAssembler,
35 mips::MipsLabel,
36 mips::Register,
37 mips::FRegister,
39 mips::VectorRegister> {
41 using Base = AssemblerTest<mips::MipsAssembler,
42 mips::MipsLabel,
43 mips::Register
[all...] |
| assembler_mips_test.cc | 29 bool operator()(const mips::Register& a, const mips::Register& b) const {
34 class AssemblerMIPSTest : public AssemblerTest<mips::MipsAssembler,
35 mips::MipsLabel,
36 mips::Register,
37 mips::FRegister,
40 using Base = AssemblerTest<mips::MipsAssembler,
41 mips::MipsLabel,
42 mips::Register,
43 mips::FRegister
[all...] |
| assembler_mips32r6_test.cc | 29 bool operator()(const mips::Register& a, const mips::Register& b) const {
34 class AssemblerMIPS32r6Test : public AssemblerTest<mips::MipsAssembler,
35 mips::MipsLabel,
36 mips::Register,
37 mips::FRegister,
39 mips::VectorRegister> {
41 using Base = AssemblerTest<mips::MipsAssembler,
42 mips::MipsLabel,
43 mips::Register
[all...] |
| /art/runtime/arch/mips/ |
| callee_save_frame_mips.h | 29 namespace mips { namespace in namespace:art
32 (1u << art::mips::RA);
34 (1 << art::mips::S2) | (1 << art::mips::S3) | (1 << art::mips::S4) | (1 << art::mips::S5) |
35 (1 << art::mips::S6) | (1 << art::mips::S7) | (1 << art::mips::GP) | (1 << art::mips::FP)
[all...] |
| fault_handler_mips.cc | 21 #include "arch/mips/callee_save_frame_mips.h"
35 // Mips specific fault handler functions.
45 *out_sp = static_cast<uintptr_t>(sc->sc_regs[mips::SP]);
57 *out_method = reinterpret_cast<ArtMethod*>(sc->sc_regs[mips::A0]);
85 sc->sc_regs[mips::SP] -= mips::MipsCalleeSaveFrameSize(CalleeSaveType::kSaveEverything);
86 uintptr_t* padding = reinterpret_cast<uintptr_t*>(sc->sc_regs[mips::SP]) + /* ArtMethod* */ 1;
89 sc->sc_regs[mips::RA] = sc->sc_pc + 4; // RA needs to point to gc map location
120 uintptr_t sp = sc->sc_regs[mips::SP];
143 sc->sc_regs[mips::T9] = sc->sc_pc; // make sure T9 points to the functio
[all...] |
| /development/scripts/ |
| example_crashes.py | 89 mips = """
92 ABI: 'mips'
|
| /external/u-boot/board/qemu-mips/ |
| Makefile | 6 obj-y = qemu-mips.o
|
| /external/capstone/cstool/ |
| cstool_mips.c | 14 cs_mips *mips; local
20 mips = &(ins->detail->mips);
21 if (mips->op_count)
22 printf("\top_count: %u\n", mips->op_count);
24 for (i = 0; i < mips->op_count; i++) {
25 cs_mips_op *op = &(mips->operands[i]);
|
| /external/strace/tests/ |
| scno_tampering.sh | 51 mips)
54 msg_prefix="mips $MIPS_ABI scno tampering does not work"
58 o32:mips)
61 skip_ "$msg_prefix on mips n64 yet"
|
| /external/strace/tests-m32/ |
| scno_tampering.sh | 51 mips)
54 msg_prefix="mips $MIPS_ABI scno tampering does not work"
58 o32:mips)
61 skip_ "$msg_prefix on mips n64 yet"
|
| /external/strace/tests-mx32/ |
| scno_tampering.sh | 51 mips)
54 msg_prefix="mips $MIPS_ABI scno tampering does not work"
58 o32:mips)
61 skip_ "$msg_prefix on mips n64 yet"
|
| /external/u-boot/arch/mips/include/asm/ |
| u-boot.h | 19 #include <asm/u-boot-mips.h>
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips16/ |
| valid.s | 1 # RUN: llvm-mc -arch=mips -mcpu=mips32r2 -mattr=+mips16 -show-encoding -show-inst < %s
|
| /external/llvm/test/MC/Mips/ |
| asciiz-directive.s | 1 # RUN: llvm-mc -triple mips-unknown-linux %s | FileCheck %s
2 # .asciiz is exactly the same as .asciz, except it's MIPS-specific.
|
| mips-pc16-fixup.s | 1 # RUN: llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 -arch=mips 2>&1 -filetype=obj | FileCheck %s
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
| asciiz-directive.s | 1 # RUN: llvm-mc -triple mips-unknown-linux %s | FileCheck %s
2 # .asciiz is exactly the same as .asciz, except it's MIPS-specific.
|
| micromips-ase-directive.s | 1 # RUN: llvm-mc -triple=mips-unknown-linux -filetype=obj %s -o - | \
2 # RUN: llvm-readobj -mips-abi-flags | \
|
| mips-pc16-fixup.s | 1 # RUN: llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 -arch=mips 2>&1 -filetype=obj | FileCheck %s
|
| /external/lzma/CPP/7zip/ |
| Aes.mak | 4 !IF "$(PLATFORM)" != "ia64" && "$(PLATFORM)" != "mips" && "$(PLATFORM)" != "arm" && "$(PLATFORM)" != "arm64"
|
| /external/u-boot/arch/mips/cpu/mips32/ |
| config.mk | 7 -T $(srctree)/examples/standalone/mips.lds
|
| /external/libopus/ |
| silk_headers.mk | 37 silk/fixed/mips/noise_shape_analysis_FIX_mipsr1.h \
38 silk/fixed/mips/warped_autocorrelation_FIX_mipsr1.h \
42 silk/mips/macros_mipsr1.h \
43 silk/mips/NSQ_del_dec_mipsr1.h \
44 silk/mips/sigproc_fix_mipsr1.h
|
| celt_headers.mk | 45 celt/mips/celt_mipsr1.h \
46 celt/mips/fixed_generic_mipsr1.h \
47 celt/mips/kiss_fft_mipsr1.h \
48 celt/mips/mdct_mipsr1.h \
49 celt/mips/pitch_mipsr1.h \
50 celt/mips/vq_mipsr1.h \
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mt/ |
| set-directive.s | 1 # RUN: llvm-mc < %s -arch=mips -mcpu=mips32r2 -filetype=obj -o - | \
2 # RUN: llvm-readobj -mips-abi-flags | FileCheck %s --check-prefix=CHECK-OBJ
3 # RUN: llvm-mc < %s -arch=mips -mcpu=mips32r2 -filetype=asm -o - | \
6 # Test that the MT ASE flag in .MIPS.abiflags is _not_ set by .set.
|
| /external/libvpx/libvpx/vpx_dsp/ |
| vpx_dsp.mk | 14 DSP_SRCS-$(HAVE_MSA) += mips/macros_msa.h
67 DSP_SRCS-$(HAVE_MSA) += mips/add_noise_msa.c
68 DSP_SRCS-$(HAVE_MSA) += mips/deblock_msa.c
78 DSP_SRCS-$(HAVE_MSA) += mips/intrapred_msa.c
79 DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred4_dspr2.c
80 DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred8_dspr2.c
81 DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred16_dspr2.c
83 DSP_SRCS-$(HAVE_DSPR2) += mips/common_dspr2.h
84 DSP_SRCS-$(HAVE_DSPR2) += mips/common_dspr2.c
141 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_horiz_msa.
[all...] |
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCAsmInfo.cpp | 1 //===-- MipsMCAsmInfo.cpp - Mips Asm Properties ---------------------------===//
22 if ((TheTriple.getArch() == Triple::mips) ||
47 if (TheTriple.getArch() == Triple::mips ||
|
